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Age
Commit message (
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Author
2015-05-05
mem, cpu: Add a separate flag for strictly ordered memory
Andreas Sandberg
2015-05-05
mem: Snoop into caches on uncacheable accesses
Andreas Hansson
2015-05-05
cpu: Work around gcc 4.9 issues with Num_OpClasses
Andreas Hansson
2015-04-29
cpu: o3: replace issueLatency with bool pipelined
Nilay Vaish
2015-04-29
cpu: o3: single cycle default div microop latency on x86
Nilay Vaish
2015-04-22
cpu: remove conditional check (count > 0) on o3 IQ squashes
Brandon Potter
2015-04-13
cpu: re-organizes the branch predictor structure.
Dibakar Gope
2015-04-03
cpu: fix system total instructions accounting
Nikos Nikoleris
2015-03-09
cpu: o3: another assert instead of check
Nilay Vaish
2015-03-09
cpu: o3: Remove unused code in iew, add assert instead.
Nilay Vaish
2015-03-09
cpu: o3: commit: mark pipeline delay variable as consts
Nilay Vaish
2015-03-09
cpu: o3: remove unused stat variables.
Nilay Vaish
2015-03-09
cpu: o3: combine if with same condition
Nilay Vaish
2015-03-09
cpu: o3: remove member variable squashCounter
Nilay Vaish
2015-03-09
cpu: o3: remove unused function annotateMemoryUnits()
Nilay Vaish
2015-03-02
cpu: o3 register renaming request handling improved
Rekai
2015-03-02
mem: Split port retry for all different packet classes
Andreas Hansson
2015-02-16
arch: Make readMiscRegNoEffect const throughout
Andreas Hansson
2015-02-06
cpu: Idle CPU status logic revised
Alexandru Dutu
2015-01-25
cpu: Remove all notion that we know when the cpu is misspeculating.
Ali Saidi
2014-12-05
cpu: Only check for PC events on instruction boundaries.
Gabe Black
2014-12-02
cpu, o3: Ignored invalidate causing same-address load reordering
Marco Elver
2014-12-02
cpu: Move packet deallocation to recvTimingResp in the O3 CPU
Stephan Diestelhorst
2014-12-02
mem: Assume all dynamic packet data is array allocated
Andreas Hansson
2014-12-02
mem: Add const getters for write packet data
Andreas Hansson
2014-11-14
arm: Fixes based on UBSan and static analysis
Andreas Hansson
2014-11-06
x86 isa: This patch attempts an implementation at mwait.
Marc Orr
2014-10-29
cpu: Add writeback modeling for drain functionality
Mitch Hayenga
2014-10-29
cpu: Add drain check functionality to IEW
Mitch Hayenga
2014-10-20
cpu: o3: corrects base FP and CC register index in removeThread()
Nilay Vaish
2014-10-16
arch: Use shared_ptr for all Faults
Andreas Hansson
2014-10-16
o3: Use shared_ptr for MemDepEntry
Andreas Hansson
2014-10-16
cpu: Probe points for basic PMU stats
Andreas Sandberg
2014-10-11
cpu: Fix o3 SMT IQCount bug
Andrew Lukefahr
2014-10-09
cpu: Remove Ozone CPU from the source tree
Mitch Hayenga
2014-09-27
arch: Use const StaticInstPtr references where possible
Andreas Hansson
2014-09-20
cpu: Remove unused deallocateContext calls
Mitch Hayenga
2014-09-20
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
Mitch Hayenga
2014-09-20
base: Clean up redundant string functions and use C++11
Andreas Hansson
2014-09-19
arch: Pass faults by const reference where possible
Andreas Hansson
2014-09-19
cpu: Use a deque in o3 rename instruction queue
Andreas Hansson
2014-09-09
cpu: Only iterate over possible threads on the o3 cpu
Mitch Hayenga
2014-05-13
mem: Refactor assignment of Packet types
Curtis Dunham
2014-09-03
cpu: Fix o3 drain bug
Mitch Hayenga
2014-04-29
arm: use condition code registers for ARM ISA
Curtis Dunham
2014-09-03
cpu: Fix cache blocked load behavior in o3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix o3 quiesce fetch bug
Mitch Hayenga
2014-09-03
cpu: Fix SMT scheduling issue with the O3 cpu
Mitch Hayenga
2014-09-03
cpu: Add a fetch queue to the o3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix o3 front-end pipeline interlock behavior
Mitch Hayenga
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