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path: root/src/cpu/o3
AgeCommit message (Expand)Author
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-03-05Added an x86 dyninstGabe Black
2007-02-10Clean up tracing stuff more, get rid of the trace log sinceNathan Binkert
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
2007-01-29A minor hack to get branch prediction to behave like before on Alpha.Gabe Black
2007-01-29Fixed a warning about an unused variable.Gabe Black
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-30Fix up previous commit to proper logic.Kevin Lim
2006-12-28Fixes to get non-delay slot ISAs (Alpha) working again, and pulling some debu...Gabe Black
2006-12-28Phased out DelaySlotInfo.Gabe Black
2006-12-28Some fixes for decode stage branches without delay slots. This will need some...Gabe Black
2006-12-28Make sure the value of PC is actually updated now that the instruction target...Gabe Black
2006-12-28Implement a stub nnpc for alpha that is read only as npc+4.Gabe Black
2006-12-26Remove some #if FULL_SYSTEMs so MP stuff works even in SE mode.Kevin Lim
2006-12-21styleNathan Binkert
2006-12-20don't use (*activeThreads).begin(), use activeThreads->blah().Nathan Binkert
2006-12-20<scold> Make sure that variables are always initalized! </scold>Nathan Binkert
2006-12-20Fixes to get MIPS_SE to compile.Gabe Black
2006-12-20Fixes to get ALPHA_FS and ALPHA_SE to compile again.Gabe Black
2006-12-18Fix a place where the wrong width parameter was used, and set the nextNPC cor...Gabe Black
2006-12-18Make sure you only handle branch delay slots specially when there actually wa...Gabe Black
2006-12-17Convert Alpha (and finish converting MIPS) to newSteve Reinhardt
2006-12-16Merge zizzer:/bk/newmemGabe Black
2006-12-16Switch the endianness of data that's forwarded. This is the same sort of prob...Gabe Black
2006-12-16Make fetch detect when a branch is happening, rather than trying to compute w...Gabe Black
2006-12-16Don't have "predict" set the predicted target of the instruction. Do that exp...Gabe Black
2006-12-16Add in capability to return to unblocking after a squash. This is needed beca...Gabe Black
2006-12-16Make sure endian conversion is done on the memory data when it's just set to ...Gabe Black
2006-12-16Make the decoder use the new setup in the dyninsts for branch prediction.Gabe Black
2006-12-16Made branch delay slots get squashed, and passed back an NPC and NNPC to star...Gabe Black
2006-12-16Changes to the isa_parser and affected files to fix an indexing problem with ...Gabe Black
2006-12-15little fixes i noticed while searching for reason for address range issues (b...Lisa Hsu
2006-12-13Merge zizzer:/bk/newmemLisa Hsu
2006-12-12Merge zizzer:/bk/newmemLisa Hsu
2006-12-12Merge zizzer:/bk/newmem/Gabe Black
2006-12-12Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-12-12Allow for multiple redirects to happen on a single cycle (only the one for th...Kevin Lim
2006-12-12Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...Steve Reinhardt
2006-12-11Fix up in case a req hasn't yet been generated for this instruction (if there...Kevin Lim
2006-12-11Fix for fetch to use the icache's block size to generate proper access size.Kevin Lim
2006-12-07Compilation fixesGabe Black
2006-12-07Fix for squashing during a serializing instruction.Gabe Black
2006-12-06Fix for MIPS_SE/m5.fast compile.Kevin Lim
2006-12-06Use the renamed register index, rather than the flattened one.Gabe Black
2006-12-06Got rid of some typedefs and moved the tlbs into the base o3 cpu.Gabe Black
2006-12-06Use the setSyscallReturn defined in arch rather than duplicating it here.Gabe Black
2006-12-06Moved the RegIdx arrays to the base dyninst.Gabe Black
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