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path: root/src/cpu/o3
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2007-10-02CPU: Make the cpuid parameter get set in SE mode as well.Gabe Black
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2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
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2007-10-02CPU: Make sure the system parameter gets set in the cpu builders. Other ↵Gabe Black
parameters need to be fixed as well. --HG-- extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
2007-09-28Rename cycles() function to ticks()Ali Saidi
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2007-09-28Update statistics to use cycles properly instead of ticksAli Saidi
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2007-09-19X86: Put in the foundation for x87 stack based fp registers.Gabe Black
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2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-26Merge with headGabe Black
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2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
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2007-08-21Merge with head.Gabe Black
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2007-08-21o3: Fix for retry ID bug.Kevin Lim
It should be cleared prior to the call to recvRetry. Add extra DPRINTF statement for clearer debugging output. --HG-- extra : convert_revision : e2332754743f42d60e159ac89f6fb0fd8b7f57f8
2007-08-13O3: Set up the predicted npc and nnpc for a fault carrying noop so that it ↵Gabe Black
doesn't cause a false branch mispredict. --HG-- extra : convert_revision : 2820597cc966cd7b128cef0dab48fe05089533d7
2007-08-13Move the "translate" member functions back into the base o3 class.Gabe Black
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2007-07-31Merge from head.Steve Reinhardt
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2007-07-30Fix problem with tracer not being initialized.Gabe Black
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2007-07-29Merge Gabe's changes from head.Steve Reinhardt
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2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
These need to be refined a little still and given parameters. --HG-- extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
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2007-07-26X86: Fix argument register indexing.Gabe Black
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg. --HG-- extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23Fix WriteReq/StoreCondReq setting in O3.Steve Reinhardt
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2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
Atomic mode seems to work. Timing is closer but not there yet. --HG-- extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
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2007-06-30Event descriptions should not end in "event"Steve Reinhardt
(they function as adjectives not nouns) --HG-- extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-28o3cpu build for mipsKorey Sewell
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2007-06-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro src/cpu/o3/fetch_impl.hh: hand merge --HG-- extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
2007-06-20Fix compiler errors.Gabe Black
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2007-06-20Don't do checker stuff if the checker is not definedNathan Binkert
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2007-06-20Make sure all parameters have default values if they'reNathan Binkert
supposed to and make sure parameters have the right type. Also make sure that any object that should be an intermediate type has the right options set. --HG-- extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
2007-06-19Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro src/cpu/base_dyn_inst_impl.hh: src/cpu/o3/fetch_impl.hh: Hand merge --HG-- extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
2007-06-19Make branches work by repopulating the predecoder every time through. This ↵Gabe Black
is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. --HG-- extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
2007-06-13Seperate the pc-pc and the pc of the incoming bytes, and get rid of the ↵Gabe Black
"moreBytes" which just takes a MachInst. src/arch/x86/predecoder.cc: Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes. --HG-- extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
2007-06-09Use the right typeNathan Binkert
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2007-06-01Fix typo so m5.fast will compileNathan Binkert
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2007-06-01don't generate trace data unless tracing is onAli Saidi
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2007-05-30Fix cut-n-pasto to make the path correctNathan Binkert
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2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
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2007-05-12Make sure all addresses used in syscalls are truncated to 32 bits. Actually ↵Gabe Black
-all- arguements are truncated to 32 bits, but we should be able to get away with it. --HG-- extra : convert_revision : 3b8766c68a4ab36e2e769fac4812657f3f7e0d1c
2007-05-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into doughnut.mwconnections.com:/home/gblack/newmem-o3-micro --HG-- extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
2007-04-26Remove extra delete that was causing segfault.Kevin Lim
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2007-04-26Remove unnecessary check.Kevin Lim
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2007-04-23Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-specGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro --HG-- extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
2007-04-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
2007-04-22Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head --HG-- extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48
2007-04-22Use proper cycles for IPC and CPI equations.Kevin Lim
src/cpu/o3/cpu.cc: Use proper cycles for these equations. --HG-- extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae
2007-04-22Make the floating point zero register special handling only apply for ALPHA.Gabe Black
--HG-- extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
2007-04-21fixes for solaris compileAli Saidi
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2007-04-15Make an inner loop which pulls microops out of macroops. These aren't ↵Gabe Black
checked for control flow because we can pull out microops until we run out of buffer. This prevents microops from being interpretted as branches because the pc doesn't become npc. --HG-- extra : convert_revision : 9fff7c6c32900692bbc567ecb75701c9c73da259
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