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path: root/src/cpu/ozone
AgeCommit message (Expand)Author
2009-04-15ThreadState: initialize status to Halted in constructor.Steve Reinhardt
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-02-27Processes: Make getting and setting system call arguments part of a process o...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
2008-11-10O3CPU: Make the instcount debugging stuff per-cpu.Clint Smullen
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-10-11CPU: Eliminate the simPalCheck funciton.Gabe Black
2008-10-11CPU: Eliminate the hwrei function.Gabe Black
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-08-18Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was ...Richard Strong
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-02-10Fix #include lines for renamed cache files.Steve Reinhardt
2008-02-06Make the Event::description() a const functionStephen Hines
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one f...Ali Saidi
2007-10-02CPU: Make the cpuid parameter get set in SE mode as well.Gabe Black
2007-10-02CPU: Make sure the system parameter gets set in the cpu builders. Other param...Gabe Black
2007-09-28Rename cycles() function to ticks()Ali Saidi
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-05-30Fix cut-n-pasto to make the path correctNathan Binkert
2007-05-28Remove unnecessary include of physical.hh.Steve Reinhardt
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-03-13fix segfault when peer owner attempts to use functional portAli Saidi
2007-03-10Rework the way SCons recurses into subdirectories, making itNathan Binkert
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-02-12some forgotten commitsAli Saidi
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-03Merge zizzer:/bk/newmemGabe Black