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path: root/src/cpu/ozone
AgeCommit message (Expand)Author
2013-01-07cpu: Rename defer_registration->switched_outAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-07cpu: rename the misleading inSyscall to noSquashFromTCAli Saidi
2012-08-21CPU: Remove overloaded function_trace_start parameterAndreas Hansson
2012-06-05sim: Remove FastAllocAli Saidi
2012-04-14MEM: Remove the Broadcast destination from the packetAndreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-09O3/Ozone: Eliminate dead code counting software prefetch instsGeoffrey Blake
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-02-24MEM: Make port proxies use references rather than pointersAndreas Hansson
2012-02-07Faults: Turn off arch/faults.hhGabe Black
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-10-30SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.Gabe Black
2011-10-16SE/FS: Include getMemPort in FS.Gabe Black
2011-10-16SE/FS: Build/expose vport in SE mode.Gabe Black
2011-10-16CPU: Make physPort and getPhysPort available in SE mode.Gabe Black
2011-08-02O3: Get rid of the raw ExtMachInst constructor on DynInsts.Gabe Black
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-04-04CPU: Remove references to memory copy operationsAli Saidi
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2011-01-03Move sched_list.hh and timebuf.hh from src/base to src/cpu.Steve Reinhardt
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-08-23ISA: Get rid of old, unused utility functions cluttering up the ISAs.Gabe Black
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
2010-02-26cpu_models: get rid of cpu_models.py and move the stuff into SConsNathan Binkert
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2009-08-01Fix setting of INST_FETCH flag for O3 CPU.Steve Reinhardt
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
2009-04-20request: rename INST_READ to INST_FETCH.Steve Reinhardt
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-15ThreadState: initialize status to Halted in constructor.Steve Reinhardt
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
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