gem5 - gem5

Age	Commit message (Expand)	Author
2019-03-27	cpu: Fixed the indirect branch predictor GHR handling	Pau Cabre
2019-02-13	cpu: Added 8KB and 64KB TAGE-SC-L branch predictor	Javier Bueno
2019-02-05	cpu: Made the Loop Predictor a SimObject	Javier Bueno
2019-02-05	cpu: Made TAGE a SimObject that can be used by other predictors	Jairo Balart
2018-12-11	cpu: Fixed typos in parameter/stats descriptions	Pau Cabre
2018-12-11	cpu: Added parameters to enable/disable features in LTAGE	Pau Cabre
2018-11-28	cpu: split LTAGE implementation into a base TAGE and a derived LTAGE	Pau Cabre
2018-11-22	cpu: Made LTAGE parameters configurable	Pau Cabre
2018-11-22	cpu: Fixed useful counter handling in LTAGE	Pau Cabre
2018-11-22	cpu: Fixes on the loop predictor part of LTAGE	Pau Cabre
2018-11-17	configs: Added an option for choosing branch predictor type	Pau Cabre
2018-11-14	cpu: Fixed ratio of pred to hyst bits for LTAGE Bimodal	Pau Cabre
2016-12-21	cpu: implement an L-TAGE branch predictor	Arthur Perais
2016-04-05	cpu: Add an indirect branch target predictor	Mitch Hayenga
2016-04-06	Revert power patch sets with unexpected interactions	Andreas Sandberg
2016-04-05	cpu: Add an indirect branch target predictor	Mitch Hayenga
2015-04-13	cpu: re-organizes the branch predictor structure.	Dibakar Gope
2014-06-30	cpu: implement a bi-mode branch predictor	Anthony Gutierrez
2013-05-14	cpu: remove local/globalHistoryBits params from branch pred	Anthony Gutierrez
2013-01-24	branch predictor: move out of o3 and inorder cpus	Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E)