| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert |
| 2013-10-15 | cpu: clean up architectural register classification | Steve Reinhardt |
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index : gem5 | |
| gem5 |
| summaryrefslogtreecommitdiff |