| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-10-15 | cpu: add a condition-code register class | Yasuko Eckert | |
| Add a third register class for condition codes, in parallel with the integer and FP classes. No ISAs use the CC class at this point though. | |||
| 2013-10-15 | cpu: clean up architectural register classification | Steve Reinhardt | |
| Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. | |||
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index : gem5 | |
| gem5 |
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