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path: root/src/cpu/simple/AtomicSimpleCPU.py
AgeCommit message (Expand)Author
2014-09-20cpu: use probes infrastructure to do simpoint profilingDam Sunwoo
2013-04-22cpu: generate SimPoint basic block vector profilesDam Sunwoo
2013-02-15cpu: Add CPU metadata om the Python classesAndreas Sandberg
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-04-03Atomic: Remove the physmem_port and access memory directlyAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2011-02-03Config: Keep track of uncached and cached ports separately.Gabe Black
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2008-08-19CPU: Get rid of two more duplicated CPU params.Gabe Black
2008-08-18Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was ...Richard Strong
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-06-18AtomicSimpleCPU: Separate data stalls from instruction stalls.Nathan Binkert
2007-11-12X86: Implement a page table walker.Gabe Black
2007-08-08Added fastmem option.Vincentius Robby
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert