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path: root/src/cpu/simple/atomic.cc
AgeCommit message (Expand)Author
2014-05-13mem: Refactor assignment of Packet typesCurtis Dunham
2014-01-24cpu: Add support for instructions that zero cache lines.Ali Saidi
2014-01-24cpu: Add CPU support for generatig wake up events when LLSC adresses are snoo...Ali Saidi
2014-01-24mem: per-thread cache occupancy and per-block agesDam Sunwoo
2014-01-24cpu: remove faulty simpoint basic block inst count assertionDam Sunwoo
2013-08-19cpu: Accurately count idle cycles for simple cpuLena Olson
2013-07-18mem: Set the cache line size on a system levelAndreas Hansson
2013-04-22cpu: generate SimPoint basic block vector profilesDam Sunwoo
2013-02-15sim: Add a system-global option to bypass cachesAndreas Sandberg
2013-02-15cpu: Refactor memory system checksAndreas Sandberg
2013-01-07cpu: Unify the serialization code for all of the CPU modelsAndreas Sandberg
2013-01-07cpu: Make sure that a drained atomic CPU isn't executing ucodeAndreas Sandberg
2013-01-07cpu: Rename defer_registration->switched_outAndreas Sandberg
2013-01-07cpu: Correctly call parent on switchOut() and takeOverFrom()Andreas Sandberg
2013-01-07cpu: Check that the memory system is in the correct modeAndreas Sandberg
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
2012-07-09Port: Align port names in C++ and PythonAndreas Hansson
2012-06-05cpu: Don't init simple and inorder CPUs if they are defered.Anthony Gutierrez
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
2012-04-14MEM: Remove the Broadcast destination from the packetAndreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-04-03Atomic: Remove the physmem_port and access memory directlyAndreas Hansson
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-30CPU: Unify initMemProxies across CPUs and simulation modesAndreas Hansson
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-11-01SE/FS: Expose the same methods on the CPUs in SE and FS modes.Gabe Black
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ExecContext: Get rid of the now unused read/write templated functions.Gabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-03-17ARM: Detect and skip udelay() functions in linux kernel.Ali Saidi
2011-03-01Spelling: Fix the a spelling error by changing mmaped to mmapped.Gabe Black
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-08-25CPU: Print out traces for faluting inst when the flag ExecFaulting is setAli Saidi
2010-08-13CPU: Add readBytes and writeBytes functions to the exec contexts.Gabe Black
2010-08-13CPU: Tidy up endianness handling for mmapped "IPR"s.Gabe Black
2010-03-23cpu: get rid of uncached access "events"Steve Reinhardt
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