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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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path:
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src
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cpu
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simple
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base.cc
Age
Commit message (
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)
Author
2013-01-07
arch: Make the ISA class inherit from SimObject
Andreas Sandberg
2013-01-04
Decoder: Remove the thread context get/set from the decoder.
Gabe Black
2012-09-19
AddrRange: Transition from Range<T> to AddrRange
Andreas Hansson
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
2012-04-15
CPU: Tidy up some formatting and a DPRINTF in the simple CPU base class.
Gabe Black
2012-03-09
CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
Geoffrey Blake
2012-02-12
cpu: add separate stats for insts/ops both globally and per cpu model
Anthony Gutierrez
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-02-10
SE/FS: Record the system pointer all the time for the simple CPU.
Gabe Black
2012-02-07
Faults: Turn off arch/faults.hh
Gabe Black
2012-01-31
Merge with head, hopefully the last time for this batch.
Gabe Black
2012-01-31
clang: Enable compiling gem5 using clang 2.9 and 3.0
Koan-Sin Tan
2012-01-31
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Geoffrey Blake
2011-11-18
SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
Gabe Black
2011-11-01
SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
Gabe Black
2011-11-01
SE/FS: Expose the same methods on the CPUs in SE and FS modes.
Gabe Black
2011-09-09
Decode: Pull instruction decoding out of the StaticInst class into its own.
Gabe Black
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-02-06
mcpat: Adds McPAT performance counters
Joel Hestness
2011-01-07
Replace curTick global variable with accessor functions.
Steve Reinhardt
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-09-13
CPU: Get rid of the now unnecessary getInst/setInst family of functions.
Gabe Black
2010-09-13
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Gabe Black
2010-06-14
stats: get rid of the never-really-used event stuff
Nathan Binkert
2010-06-03
Minor remote GDB cleanup.
Steve Reinhardt
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
CPU: Reset fetch offset after a exception
Ali Saidi
2010-06-02
ARM: Make the predecoder handle Thumb instructions.
Gabe Black
2010-03-23
cpu: fix exec tracing memory corruption bug
Steve Reinhardt
2009-09-23
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
Nathan Binkert
2009-08-01
Fix setting of INST_FETCH flag for O3 CPU.
Steve Reinhardt
2009-07-08
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
Gabe Black
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-05-26
types: add a type for thread IDs and try to use it everywhere
Nathan Binkert
2009-05-17
includes: sort includes again
Nathan Binkert
2009-05-17
types: Move stuff for global types into src/base/types.hh
Nathan Binkert
2009-04-20
request: rename INST_READ to INST_FETCH.
Steve Reinhardt
2009-04-15
Get rid of the Unallocated thread context state.
Steve Reinhardt
2009-02-26
CPA: Add code to automatically record function symbols as CPU executes.
Ali Saidi
2009-02-25
CPU: Implement translateTiming which defers to translateAtomic, and convert t...
Gabe Black
2009-02-25
ISA: Replace the translate functions in the TLBs with translateAtomic.
Gabe Black
2009-02-25
CPU: Get rid of translate... functions from various interface classes.
Gabe Black
2009-02-01
CPU: Don't always reset the micro pc on faults. Let the faults handle it.
Gabe Black
2009-02-01
X86: Make sure the predecoder is cleared out for interrupts.
Gabe Black
2009-01-24
cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.
Nathan Binkert
2009-01-06
Tracing: Make tracing aware of macro and micro ops.
Gabe Black
2008-10-21
style: Use the correct m5 style for things relating to interrupts.
Nathan Binkert
2008-10-12
CPU: Make the highest order bit in the micro pc determine if it's combination...
Gabe Black
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