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path: root/src/cpu/simple/base.cc
AgeCommit message (Collapse)Author
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
Expand the help text on the --remote-gdb-port option so people know you can use it to disable remote gdb without reading the source code, and thus don't waste any time trying to add a separate option to do that. Clean up some gdb-related cruft I found while looking for where one would add a gdb disable option, before I found the comment that told me that I didn't need to do that.
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02CPU: Reset fetch offset after a exceptionAli Saidi
2010-06-02ARM: Make the predecoder handle Thumb instructions.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
Accessing traceData (to call setAddress() and/or setData()) after initiating a timing translation was causing crashes, since a failed translation could delete the traceData object before returning. It turns out that there was never a need to access traceData after initiating the translation, as the traced data was always available earlier; this ordering was merely historical. Furthermore, traceData->setAddress() and traceData->setData() were being called both from the CPU model and the ISA definition, often redundantly. This patch standardizes all setAddress and setData calls for memory instructions to be in the CPU models and not in the ISA definition. It also moves those calls above the translation calls to eliminate the crashes.
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-08-01Fix setting of INST_FETCH flag for O3 CPU.Steve Reinhardt
It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily whether it's getting set or not.
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-04-20request: rename INST_READ to INST_FETCH.Steve Reinhardt
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
Basically merge it in with Halted. Also had to get rid of a few other functions that called ThreadContext::deallocate(), including: - InOrderCPU's setThreadRescheduleCondition. - ThreadContext::exit(). This function was there to avoid terminating simulation when one thread out of a multi-thread workload exits, but we need to find a better (non-cpu-centric) way.
2009-02-26CPA: Add code to automatically record function symbols as CPU executes.Ali Saidi
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert ↵Gabe Black
the timing simple CPU to use it.
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-01CPU: Don't always reset the micro pc on faults. Let the faults handle it.Gabe Black
2009-02-01X86: Make sure the predecoder is cleared out for interrupts.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
Make interrupts use the new wakeup method, and pull all of the interrupt stuff into the cpu base class so that only the wakeup code needs to be updated. I tried to make wakeup, wakeCPU, and the various other mechanisms for waking and sleeping a little more sane, but I couldn't understand why the statistics were changing the way they were. Maybe we'll try again some day.
2009-01-06Tracing: Make tracing aware of macro and micro ops.Gabe Black
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12CPU: Make the highest order bit in the micro pc determine if it's ↵Gabe Black
combinational or from the ROM.
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into ↵Gabe Black
x86's Interrupts object.
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
A whole bunch of stuff has been converted to use the new params stuff, but the CPU wasn't one of them. While we're at it, make some things a bit more stylish. Most of the work was done by Gabe, I just cleaned stuff up a bit more at the end.
2008-07-01After a checkpoint (and thus a stats reset), the ↵Ali Saidi
not_idle_fraction/notIdleFraction statistic is really wrong. The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing with Port::Status, but _status seems a bit strage too.
2008-02-14CPU: move the PC Events code to a place where the code won't be executed ↵Ali Saidi
multiple times if an instruction faults. --HG-- extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
2007-12-16CPU: Update where the simple cpus read their cpu id from the thread context ↵Ali Saidi
to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations. --HG-- extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
2007-11-21imported patch pagewalker.patchGabe Black
--HG-- extra : convert_revision : 8ddde313f2249e1346fa51372a156f0d2ddc3b8f
2007-11-15Get MIPS simple regression working. Take out unecessary functions ↵Korey Sewell
"setShadowSet", "CacheOp" --HG-- extra : convert_revision : a9ae8a7e62c27c2db16fd3cfa7a7f0bf5f0bf8ea
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-10-18CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.Ali Saidi
--HG-- extra : convert_revision : 6d025764682181b1f67df3b1d8d1d59099136df7
2007-10-02Merge with head.Gabe Black
--HG-- extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
2007-10-02Predecoder: Clear out predecoder state on an ITLB fault.Gabe Black
--HG-- extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
--HG-- extra : convert_revision : 9dc4ea136c3c3f87a73d55e91bc4aae4eba70464
2007-09-24X86: Get X86_FS to compile.Gabe Black
--HG-- extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
2007-08-26Simple CPU: Make sure only instructions which complete without faulting are ↵Gabe Black
counted. --HG-- extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
--HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
These need to be refined a little still and given parameters. --HG-- extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-06-19Make branches work by repopulating the predecoder every time through. This ↵Gabe Black
is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. --HG-- extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
2007-06-14Modified instruction decode method.Vincentius Robby
Make code compatible with new decode method. src/arch/alpha/remote_gdb.cc: src/cpu/base_dyn_inst_impl.hh: src/cpu/exetrace.cc: src/cpu/simple/base.cc: Make code compatible with new decode method. src/cpu/static_inst.cc: src/cpu/static_inst.hh: Modified instruction decode method. --HG-- extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
2007-06-13Seperate the pc-pc and the pc of the incoming bytes, and get rid of the ↵Gabe Black
"moreBytes" which just takes a MachInst. src/arch/x86/predecoder.cc: Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes. --HG-- extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
2007-06-12Make microOp vs microop and macroOp vs macroop capitilization consistent.Gabe Black
src/arch/x86/isa/macroop.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code. src/arch/x86/isa/microops/base.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation. --HG-- extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-04don't be so aggressive with the tracing on #ifAli Saidi
--HG-- extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
2007-06-02Don't mask the pc because the Alpha predecoder needs it to set the PAL mode ↵Gabe Black
bit in the ExtMachInst. --HG-- extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
2007-06-01cast sizeof(MachInst) to Addr before generating a maskAli Saidi
--HG-- extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
2007-05-31Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 src/cpu/simple/base.cc: Hand merge --HG-- extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31Assign traceData to be NULL at BaseSimpleCPU constructor.Vincentius Robby
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls. exec tracing isn't needed for m5.fast binaries Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead. src/arch/sparc/miscregfile.cc: Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead. src/cpu/simple/base.cc: Assign traceData to be NULL at BaseSimpleCPU constructor. Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls. exec tracing isn't needed for m5.fast binaries --HG-- extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
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