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path: root/src/cpu/simple/base.cc
AgeCommit message (Expand)Author
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-06-14stats: get rid of the never-really-used event stuffNathan Binkert
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02CPU: Reset fetch offset after a exceptionAli Saidi
2010-06-02ARM: Make the predecoder handle Thumb instructions.Gabe Black
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-08-01Fix setting of INST_FETCH flag for O3 CPU.Steve Reinhardt
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
2009-04-20request: rename INST_READ to INST_FETCH.Steve Reinhardt
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
2009-02-26CPA: Add code to automatically record function symbols as CPU executes.Ali Saidi
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-01CPU: Don't always reset the micro pc on faults. Let the faults handle it.Gabe Black
2009-02-01X86: Make sure the predecoder is cleared out for interrupts.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
2009-01-06Tracing: Make tracing aware of macro and micro ops.Gabe Black
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-12CPU: Make the highest order bit in the micro pc determine if it's combination...Gabe Black
2008-10-12Turn Interrupts objects into SimObjects. Also, move local APIC state into x86...Gabe Black
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-01After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra...Ali Saidi
2008-02-14CPU: move the PC Events code to a place where the code won't be executed mult...Ali Saidi
2007-12-16CPU: Update where the simple cpus read their cpu id from the thread context t...Ali Saidi
2007-11-21imported patch pagewalker.patchGabe Black
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-10-18CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.Ali Saidi
2007-10-02Merge with head.Gabe Black
2007-10-02Predecoder: Clear out predecoder state on an ITLB fault.Gabe Black
2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
2007-09-24X86: Get X86_FS to compile.Gabe Black
2007-08-26Simple CPU: Make sure only instructions which complete without faulting are c...Gabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-06-19Make branches work by repopulating the predecoder every time through. This is...Gabe Black
2007-06-14Modified instruction decode method.Vincentius Robby