Age | Commit message (Expand) | Author |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-09-13 | CPU: Get rid of the now unnecessary getInst/setInst family of functions. | Gabe Black |
2010-09-13 | Faults: Pass the StaticInst involved, if any, to a Fault's invoke method. | Gabe Black |
2010-06-14 | stats: get rid of the never-really-used event stuff | Nathan Binkert |
2010-06-03 | Minor remote GDB cleanup. | Steve Reinhardt |
2010-06-02 | ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR. | Gabe Black |
2010-06-02 | CPU: Reset fetch offset after a exception | Ali Saidi |
2010-06-02 | ARM: Make the predecoder handle Thumb instructions. | Gabe Black |
2010-03-23 | cpu: fix exec tracing memory corruption bug | Steve Reinhardt |
2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert |
2009-08-01 | Fix setting of INST_FETCH flag for O3 CPU. | Steve Reinhardt |
2009-07-08 | Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions. | Gabe Black |
2009-06-04 | types: clean up types, especially signed vs unsigned | Nathan Binkert |
2009-05-26 | types: add a type for thread IDs and try to use it everywhere | Nathan Binkert |
2009-05-17 | includes: sort includes again | Nathan Binkert |
2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert |
2009-04-20 | request: rename INST_READ to INST_FETCH. | Steve Reinhardt |
2009-04-15 | Get rid of the Unallocated thread context state. | Steve Reinhardt |
2009-02-26 | CPA: Add code to automatically record function symbols as CPU executes. | Ali Saidi |
2009-02-25 | CPU: Implement translateTiming which defers to translateAtomic, and convert t... | Gabe Black |
2009-02-25 | ISA: Replace the translate functions in the TLBs with translateAtomic. | Gabe Black |
2009-02-25 | CPU: Get rid of translate... functions from various interface classes. | Gabe Black |
2009-02-01 | CPU: Don't always reset the micro pc on faults. Let the faults handle it. | Gabe Black |
2009-02-01 | X86: Make sure the predecoder is cleared out for interrupts. | Gabe Black |
2009-01-24 | cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. | Nathan Binkert |
2009-01-06 | Tracing: Make tracing aware of macro and micro ops. | Gabe Black |
2008-10-21 | style: Use the correct m5 style for things relating to interrupts. | Nathan Binkert |
2008-10-12 | CPU: Make the highest order bit in the micro pc determine if it's combination... | Gabe Black |
2008-10-12 | Turn Interrupts objects into SimObjects. Also, move local APIC state into x86... | Gabe Black |
2008-08-11 | params: Convert the CPU objects to use the auto generated param structs. | Nathan Binkert |
2008-07-01 | After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra... | Ali Saidi |
2008-02-14 | CPU: move the PC Events code to a place where the code won't be executed mult... | Ali Saidi |
2007-12-16 | CPU: Update where the simple cpus read their cpu id from the thread context t... | Ali Saidi |
2007-11-21 | imported patch pagewalker.patch | Gabe Black |
2007-11-15 | Get MIPS simple regression working. Take out unecessary functions "setShadowS... | Korey Sewell |
2007-11-13 | Add in files from merge-bare-iron, get them compiling in FS and SE mode | Korey Sewell |
2007-10-18 | CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases. | Ali Saidi |
2007-10-02 | Merge with head. | Gabe Black |
2007-10-02 | Predecoder: Clear out predecoder state on an ITLB fault. | Gabe Black |
2007-10-02 | CPU: Make the cpus check the pc event queues in SE mode. | Gabe Black |
2007-09-24 | X86: Get X86_FS to compile. | Gabe Black |
2007-08-26 | Simple CPU: Make sure only instructions which complete without faulting are c... | Gabe Black |
2007-08-26 | Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. | Gabe Black |
2007-07-28 | Turn the instruction tracing code into pluggable sim objects. | Gabe Black |
2007-07-23 | Major changes to how SimObjects are created and initialized. Almost all | Nathan Binkert |
2007-06-19 | Make branches work by repopulating the predecoder every time through. This is... | Gabe Black |
2007-06-14 | Modified instruction decode method. | Vincentius Robby |
2007-06-13 | Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more... | Gabe Black |
2007-06-12 | Make microOp vs microop and macroOp vs macroop capitilization consistent. | Gabe Black |
2007-06-04 | don't be so aggressive with the tracing on #if | Ali Saidi |