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path: root/src/cpu/simple/base.cc
AgeCommit message (Expand)Author
2019-05-11cpu,mem: Add support for partial loads/stores and wide mem. accessesGiacomo Gabrielli
2019-04-30arch: cpu: Track kernel stats using the base ISA agnostic type.Gabe Black
2019-04-28mem: Minimize the use of MemObject.Gabe Black
2019-04-05cpu: Correctly account for executed instructions in simple cpusNikos Nikoleris
2019-03-28cpu: Added a probe to notify the address of retired instructionsJavier Bueno
2019-02-08cpu: support atomic memory request type with AtomicOpFunctorTuan Ta
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-08x86,misc: add additional info on faulting X86 instruction, fetched PCMatt Sinclair
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-21cpu, cpu, sim: move Cycle probe updateJose Marinho
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-30cpu: Add per-thread monitorsMitch Hayenga
2015-09-30config,cpu: Add SMT support to Atomic and Timing CPUsMitch Hayenga
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-16cpu: Probe points for basic PMU statsAndreas Sandberg
2014-09-20cpu: Remove unused deallocateContext callsMitch Hayenga
2014-09-19arch: Pass faults by const reference where possibleAndreas Hansson
2014-05-09cpu: add more instruction mix statisticsCurtis Dunham
2014-02-09cpu: simple: Add support for using branch predictorsAndreas Sandberg
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-01-12base simple cpu: removes commented out code about cache opsNilay Vaish
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-07cpu: Unify the serialization code for all of the CPU modelsAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-04Decoder: Remove the thread context get/set from the decoder.Gabe Black
2012-09-19AddrRange: Transition from Range<T> to AddrRangeAndreas Hansson
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
2012-04-15CPU: Tidy up some formatting and a DPRINTF in the simple CPU base class.Gabe Black
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-02-12cpu: add separate stats for insts/ops both globally and per cpu modelAnthony Gutierrez
2012-02-12mem: Add a master ID to each request object.Ali Saidi
2012-02-10SE/FS: Record the system pointer all the time for the simple CPU.Gabe Black
2012-02-07Faults: Turn off arch/faults.hhGabe Black
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2011-11-18SE/FS: Get rid of FULL_SYSTEM in the CPU directory.Gabe Black
2011-11-01SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.Gabe Black
2011-11-01SE/FS: Expose the same methods on the CPUs in SE and FS modes.Gabe Black