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path: root/src/cpu/simple/base.hh
AgeCommit message (Expand)Author
2014-02-09cpu: simple: Add support for using branch predictorsAndreas Sandberg
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-07cpu: Unify the serialization code for all of the CPU modelsAndreas Sandberg
2012-05-26CPU: Merge the predecoder and decoder.Gabe Black
2012-05-25Decode: Make the Decoder class defined per ISA.Gabe Black
2012-03-09CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectableGeoffrey Blake
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-02-12cpu: add separate stats for insts/ops both globally and per cpu modelAnthony Gutierrez
2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
2012-01-29Implement Ali's review feedback.Gabe Black
2011-11-01SE/FS: Expose the same methods on the CPUs in SE and FS modes.Gabe Black
2011-09-19Syscall: Make the syscall function available in both SE and FS modes.Gabe Black
2011-09-09Decode: Pull instruction decoding out of the StaticInst class into its own.Gabe Black
2011-05-04CPU: Fix a case where timing simple cpu faults can nest.Ali Saidi
2011-04-15includes: sort all includesNathan Binkert
2011-02-06mcpat: Adds McPAT performance countersJoel Hestness
2010-12-07O3: Make all instructions that write a misc. register not perform the write u...Giacomo Gabrielli
2010-11-15O3: Make O3 support variably lengthed instructions.Gabe Black
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-08-31CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.Gabe Black
2010-08-23CPU: Make Exec trace to print predication result (if false) for memory instru...Min Kyu Jeong
2010-08-23ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.Min Kyu Jeong
2010-06-03Minor remote GDB cleanup.Steve Reinhardt
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-07-08Registers: Get rid of the float register width parameter.Gabe Black
2009-05-26types: add a type for thread IDs and try to use it everywhereNathan Binkert
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-11CPU: Eliminate the simPalCheck funciton.Gabe Black
2008-10-11CPU: Eliminate the hwrei function.Gabe Black
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-01After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra...Ali Saidi
2008-02-26TLB: Make a TLB base class and put a virtual demapPage function in it.Gabe Black
2008-02-14CPU: move the PC Events code to a place where the code won't be executed mult...Ali Saidi
2007-11-15Get MIPS simple regression working. Take out unecessary functions "setShadowS...Korey Sewell
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
2007-10-18CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.Ali Saidi
2007-08-26Simple CPU: Make sure only instructions which complete without faulting are c...Gabe Black
2007-08-26Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.Gabe Black
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