| Age | Commit message (Expand) | Author |
|---|
| 2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
| 2012-01-31 | clang: Enable compiling gem5 using clang 2.9 and 3.0 | Koan-Sin Tan |
| 2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
| 2012-01-29 | Implement Ali's review feedback. | Gabe Black |
| 2011-11-01 | SE/FS: Expose the same methods on the CPUs in SE and FS modes. | Gabe Black |
| 2011-09-19 | Syscall: Make the syscall function available in both SE and FS modes. | Gabe Black |
| 2011-09-09 | Decode: Pull instruction decoding out of the StaticInst class into its own. | Gabe Black |
| 2011-05-04 | CPU: Fix a case where timing simple cpu faults can nest. | Ali Saidi |
| 2011-04-15 | includes: sort all includes | Nathan Binkert |
| 2011-02-06 | mcpat: Adds McPAT performance counters | Joel Hestness |
| 2010-12-07 | O3: Make all instructions that write a misc. register not perform the write u... | Giacomo Gabrielli |
| 2010-11-15 | O3: Make O3 support variably lengthed instructions. | Gabe Black |
| 2010-11-08 | ARM/Alpha/Cpu: Change prefetchs to be more like normal loads. | Ali Saidi |
| 2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
| 2010-08-31 | CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs. | Gabe Black |
| 2010-08-23 | CPU: Make Exec trace to print predication result (if false) for memory instru... | Min Kyu Jeong |
| 2010-08-23 | ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate. | Min Kyu Jeong |
| 2010-06-03 | Minor remote GDB cleanup. | Steve Reinhardt |
| 2010-03-23 | cpu: fix exec tracing memory corruption bug | Steve Reinhardt |
| 2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert |
| 2009-07-08 | Registers: Get rid of the float register width parameter. | Gabe Black |
| 2009-05-26 | types: add a type for thread IDs and try to use it everywhere | Nathan Binkert |
| 2009-03-05 | stats: Fix all stats usages to deal with template fixes | Nathan Binkert |
| 2009-02-25 | CPU: Implement translateTiming which defers to translateAtomic, and convert t... | Gabe Black |
| 2009-01-24 | cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. | Nathan Binkert |
| 2008-11-02 | make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered | Lisa Hsu |
| 2008-10-21 | style: Use the correct m5 style for things relating to interrupts. | Nathan Binkert |
| 2008-10-20 | O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo... | Ali Saidi |
| 2008-10-11 | CPU: Eliminate the simPalCheck funciton. | Gabe Black |
| 2008-10-11 | CPU: Eliminate the hwrei function. | Gabe Black |
| 2008-09-10 | style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul... | Ali Saidi |
| 2008-08-11 | params: Convert the CPU objects to use the auto generated param structs. | Nathan Binkert |
| 2008-07-01 | After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra... | Ali Saidi |
| 2008-02-26 | TLB: Make a TLB base class and put a virtual demapPage function in it. | Gabe Black |
| 2008-02-14 | CPU: move the PC Events code to a place where the code won't be executed mult... | Ali Saidi |
| 2007-11-15 | Get MIPS simple regression working. Take out unecessary functions "setShadowS... | Korey Sewell |
| 2007-11-13 | Add in files from merge-bare-iron, get them compiling in FS and SE mode | Korey Sewell |
| 2007-10-18 | CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases. | Ali Saidi |
| 2007-08-26 | Simple CPU: Make sure only instructions which complete without faulting are c... | Gabe Black |
| 2007-08-26 | Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. | Gabe Black |
| 2007-08-07 | X86: Make a microcode branch microop. | Gabe Black |
| 2007-06-30 | Get rid of Packet result field. Error responses are | Steve Reinhardt |
| 2007-06-22 | mips import pt. 1 | Korey Sewell |
| 2007-06-13 | Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more... | Gabe Black |
| 2007-05-18 | Changes to make simple cpu handle pcs appropriately for x86 | Gabe Black |
| 2007-03-15 | Merge zizzer.eecs.umich.edu:/bk/newmem | Gabe Black |
| 2007-03-15 | Make the predecoder an object with it's own switched header file. Start addin... | Gabe Black |
| 2007-03-13 | Replaced makeExtMI with predecode. | Gabe Black |
| 2007-03-07 | I missed a couple of WithEffects, this should do it | Ali Saidi |
| 2007-03-07 | *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg | Ali Saidi |
