summaryrefslogtreecommitdiff
path: root/src/cpu/simple/timing.cc
AgeCommit message (Expand)Author
2007-03-11Make sttw and sttwa use the twin memory operations.Gabe Black
2007-03-10I thought this code got deleted, but since it hasn't I've moved it to a place...Ali Saidi
2007-03-09Two fixes:Kevin Lim
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way a...Ali Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
2006-11-29Change the connecting of the physPort and virtPort to the memory object below...Kevin Lim
2006-11-17Make an initialization pass for the thread context and set the [phys,virt]Por...Ron Dreslinski
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
2006-11-14Various fixes to delete packet and request a little better.Kevin Lim
2006-11-14Make cpu's capable of having a phase shiftRon Dreslinski
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
2006-11-11Get rid of the ParamContext for pseudo instructions and moveNathan Binkert
2006-11-06Clean up clock phase drift code a bit.Kevin Lim
2006-11-01Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-31Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...Gabe Black
2006-10-23Don't let interupts interupt microcode at undesired points.Gabe Black
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-19refactor code for the packet, get rid of packet_impl.hhNathan Binkert
2006-10-17Fixes for uni-coherence in timing mode for FS.Ron Dreslinski
2006-10-12Merge zizzer:/bk/newmemLisa Hsu
2006-10-11some drain changes in timing (kevin's) and some memory mode assertion changes...Lisa Hsu
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-09Fix caches plus sampling switch over.Kevin Lim
2006-10-08Fixes for functional path.Ron Dreslinski
2006-10-08Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable().Steve Reinhardt
2006-10-08Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)Steve Reinhardt
2006-10-08Rename some vars for clarity.Steve Reinhardt
2006-10-08Record numCycles properly.Kevin Lim
2006-10-02Be sure to set progress interval.Kevin Lim
2006-07-20Enforce the timing cpu ticking at it's clock rateAli Saidi
2006-07-14Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-12memory mode information now contained in system objectAli Saidi
2006-07-12Updates for serialization. As long as the tickEvent doesn't need to be seria...Kevin Lim
2006-07-07Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-07Switch out fixes for CPUs.Kevin Lim
2006-07-07Remove hack now that ports work properlyRon Dreslinski
2006-07-07Update cpus to use the getPort function to use a connector object to connect ...Ron Dreslinski
2006-07-06Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-06Timing cache works for hello world test.Ron Dreslinski
2006-07-06Fixes for draining.Kevin Lim
2006-07-05Rename quiesce to drain to avoid confusion with the pseudo instruction.Kevin Lim
2006-07-05Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-07-05Need to change state upon quiescing.Kevin Lim
2006-07-05Fix some unset values in the request in the timing CPU.Ron Dreslinski
2006-06-29Various fixes for the CPU models to support the features that have been moved...Kevin Lim
2006-06-07Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...Kevin Lim
2006-06-06Change ExecContext to ThreadContext. This is being renamed to differentiate ...Kevin Lim
2006-05-31Updated Authors from bk prs infoAli Saidi
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 09:43:19 +0000