index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
simple
/
timing.hh
Age
Commit message (
Expand
)
Author
2007-03-09
Two fixes:
Kevin Lim
2006-12-15
little fixes i noticed while searching for reason for address range issues (b...
Lisa Hsu
2006-11-13
Make CPU models signal to update the snoop ranges
Ron Dreslinski
2006-10-31
Ports now have a pointer to the MemObject that owns it (can be NULL).
Kevin Lim
2006-10-20
Use PacketPtr everywhere
Nathan Binkert
2006-10-09
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-09
Have cpus send snoop ranges
Ron Dreslinski
2006-10-08
Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)
Steve Reinhardt
2006-10-08
Record numCycles properly.
Kevin Lim
2006-07-20
Enforce the timing cpu ticking at it's clock rate
Ali Saidi
2006-07-12
memory mode information now contained in system object
Ali Saidi
2006-07-07
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-07-07
Switch out fixes for CPUs.
Kevin Lim
2006-07-07
Update cpus to use the getPort function to use a connector object to connect ...
Ron Dreslinski
2006-07-05
Rename quiesce to drain to avoid confusion with the pseudo instruction.
Kevin Lim
2006-06-29
Various fixes for the CPU models to support the features that have been moved...
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Add a very poor implementation of dealing with retries on timing requests. It...
Ali Saidi
2006-05-26
Fixes for TimingSimpleCPU under full system. Now boots Alpha Linux!
Steve Reinhardt
2006-05-26
Add names to memory Port objects for tracing.
Steve Reinhardt
2006-05-22
New directory structure:
Steve Reinhardt