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path: root/src/cpu/simple/timing.hh
AgeCommit message (Expand)Author
2013-08-20cpu: Fix timing CPU isDrained comment formattingAndreas Hansson
2013-08-19cpu: Fix timing CPU drain checkAndreas Hansson
2013-03-26cpu: Remove CpuPort and use MasterPort in the CPU classesAndreas Hansson
2013-02-15cpu: Refactor memory system checksAndreas Sandberg
2013-01-07cpu: Make sure that a drained timing CPU isn't executing ucodeAndreas Sandberg
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
2012-09-25ARM: Squash outstanding walks when instructions are squashed.Ali Saidi
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
2012-07-09Port: Align port names in C++ and PythonAndreas Hansson
2012-07-09Port: Move retry from port base class to Master/SlavePortAndreas Hansson
2012-06-08Timing CPU: Remove a redundant port pointerAndreas Hansson
2012-05-01MEM: Separate requests and responses for timing accessesAndreas Hansson
2012-04-14MEM: Separate snoops and normal memory requests/responsesAndreas Hansson
2012-02-24CPU: Round-two unifying instr/data CPU ports across modelsAndreas Hansson
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ExecContext: Get rid of the now unused read/write templated functions.Gabe Black
2011-04-15includes: sort all includesNathan Binkert
2011-02-11SimpleCPU: Fix a case where a DTLB fault redirects fetch and an I-side walk o...Ali Saidi
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
2010-11-15CPU: Fix bug when a split transaction is issued to a faster cacheAli Saidi
2010-08-13CPU: Add readBytes and writeBytes functions to the exec contexts.Gabe Black
2010-02-12BaseDynInst: Make the TLB translation timing instead of atomic.Timothy M. Jones
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2008-11-13CPU: Refactor read/write in the simple timing CPU.Gabe Black
2008-11-09CPU: Make unaligned accesses work in the timing simple CPU.Gabe Black
2008-10-27CPU: The API change to EventWrapper did not get propagated to the entirety o...Clint Smullen
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-07-01After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra...Ali Saidi
2008-02-06Make the Event::description() a const functionStephen Hines
2008-01-02Additional comments and helper functions for PrintReq.Steve Reinhardt
2007-10-22CPU: Add functions to the "ExecContext"s that translate a given address.Gabe Black
2007-10-18CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.Ali Saidi
2007-10-01CPU: fix sparc_fs booting with SimpleTimingCPU.Ali Saidi
2007-06-30Event descriptions should not end in "event"Steve Reinhardt
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-05-20Add new EventWrapper constructor that takes a Tick valueSteve Reinhardt
2007-03-09Two fixes:Kevin Lim
2006-12-15little fixes i noticed while searching for reason for address range issues (b...Lisa Hsu
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
2006-10-31Ports now have a pointer to the MemObject that owns it (can be NULL).Kevin Lim
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim