Age | Commit message (Collapse) | Author |
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For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
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should configure their editors to not insert tabs
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done to be consistent with its
python type of a latency. In addition, the multiple definitions of profile in the different cpu models caused
problems for intialization of the interval value. If a child class's profile value was defined, the parent
BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the
multiple redifitions of profile in the child CPU classes.
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A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them. While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.
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a newly created one can.
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not_idle_fraction/notIdleFraction statistic is really wrong.
The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information
was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone
care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing
with Port::Status, but _status seems a bit strage too.
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Separate simulation of icache stalls and dat stalls.
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--HG--
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multiple times if an instruction faults.
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to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.
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"setShadowSet", "CacheOp"
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file with them all.
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into multiple memory access.
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counted.
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Lets CPU accesses to physical memory bypass Bus.
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Also some touch up for ruflag.
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These need to be refined a little still and given parameters.
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