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Age
Commit message (
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Author
2011-02-03
Config: Keep track of uncached and cached ports separately.
Gabe Black
2011-01-07
Replace curTick global variable with accessor functions.
Steve Reinhardt
2010-12-07
O3: Make all instructions that write a misc. register not perform the write u...
Giacomo Gabrielli
2010-11-15
O3: Make O3 support variably lengthed instructions.
Gabe Black
2010-11-15
CPU: Fix bug when a split transaction is issued to a faster cache
Ali Saidi
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-09-30
CPU/Cache: Fix some errors exposed by valgrind
Ali Saidi
2010-09-13
CPU: Get rid of the now unnecessary getInst/setInst family of functions.
Gabe Black
2010-09-13
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Gabe Black
2010-08-31
CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.
Gabe Black
2010-08-25
CPU: Print out traces for faluting inst when the flag ExecFaulting is set
Ali Saidi
2010-08-23
CPU: Make Exec trace to print predication result (if false) for memory instru...
Min Kyu Jeong
2010-08-23
ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.
Min Kyu Jeong
2010-08-13
Merge with head.
Gabe Black
2010-08-13
CPU: Add readBytes and writeBytes functions to the exec contexts.
Gabe Black
2010-08-13
CPU: Tidy up endianness handling for mmapped "IPR"s.
Gabe Black
2010-08-12
TimingSimpleCPU: fix NO_ACCESS memory op handling
Joel Hestness
2010-06-14
stats: get rid of the never-really-used event stuff
Nathan Binkert
2010-06-03
Minor remote GDB cleanup.
Steve Reinhardt
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
CPU: Reset fetch offset after a exception
Ali Saidi
2010-06-02
ARM: Make the predecoder handle Thumb instructions.
Gabe Black
2010-03-23
cpu: get rid of uncached access "events"
Steve Reinhardt
2010-03-23
cpu: fix exec tracing memory corruption bug
Steve Reinhardt
2010-03-21
TimingSimpleCPU: Fixed uncacacheable request read bug
Brad Beckmann
2010-02-26
cpu_models: get rid of cpu_models.py and move the stuff into SCons
Nathan Binkert
2010-02-12
BaseDynInst: Make the TLB translation timing instead of atomic.
Timothy M. Jones
2009-11-18
m5: Fixed bug in atomic cpu destructor
Brad Beckmann
2009-11-10
Mem: Eliminate the NO_FAULT request flag.
Gabe Black
2009-09-23
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
Nathan Binkert
2009-09-22
python: Move more code into m5.util allow SCons to use that code.
Nathan Binkert
2009-08-23
Atomic CPU: Respect the NO_ACCESS request flag.
Gabe Black
2009-08-01
Fix setting of INST_FETCH flag for O3 CPU.
Steve Reinhardt
2009-07-08
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
Gabe Black
2009-07-08
Registers: Get rid of the float register width parameter.
Gabe Black
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-05-26
types: add a type for thread IDs and try to use it everywhere
Nathan Binkert
2009-05-17
includes: sort includes again
Nathan Binkert
2009-05-17
types: Move stuff for global types into src/base/types.hh
Nathan Binkert
2009-04-20
request: rename INST_READ to INST_FETCH.
Steve Reinhardt
2009-04-19
Mem: Change isLlsc to isLLSC.
Gabe Black
2009-04-19
CPUs: Make the atomic CPU support locked memory accesses.
Gabe Black
2009-04-19
Memory: Rename LOCKED for load locked store conditional to LLSC.
Gabe Black
2009-04-19
CPU: If the simple CPU is already idle, just return from suspendContext, don'...
Gabe Black
2009-04-15
Get rid of the Unallocated thread context state.
Steve Reinhardt
2009-04-08
tlb: More fixing of unified TLB
Nathan Binkert
2009-04-08
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Gabe Black
2009-03-11
cpu: fix minor endian issue with trace output
Steve Reinhardt
2009-03-05
stats: Fix all stats usages to deal with template fixes
Nathan Binkert
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