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path: root/src/cpu/simple
AgeCommit message (Expand)Author
2017-07-12cpu: Refactor some Event subclasses to lambdasSean Wilson
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-06-20cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-08-15cpu, arch: fix the type used for the request flagsNikos Nikoleris
2016-06-06pwr: Low-power idle power state for idle CPUsDavid Guillen Fandos
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2014-12-09power: Low-power idle power state for idle CPUsAkash Bagdia
2015-11-27base: Add support for changing output directoriesAndreas Sandberg
2015-07-19cpu: Fix LLSC atomic CPU wakeupKrishnendra Nathella
2016-02-10mem: Deduce if cache should forward snoopsAndreas Hansson
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2015-10-12misc: Add explicit overrides and fix other clang >= 3.5 issuesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-30cpu: Add per-thread monitorsMitch Hayenga
2015-09-30config,cpu: Add SMT support to Atomic and Timing CPUsMitch Hayenga
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-04-13cpu: re-organizes the branch predictor structure.Dibakar Gope
2015-04-03cpu: fix system total instructions accountingNikos Nikoleris
2015-03-23mem: rename Locked/LOCKED to LockedRMW/LOCKED_RMWSteve Reinhardt
2015-02-11mem: restructure Packet cmd initialization a bit moreSteve Reinhardt
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-02-03cpu: Ensure timing CPU sinks response before sending new requestAndreas Hansson
2015-01-25sim: Clean up InstRecordAli Saidi
2015-01-25cpu: Remove all notion that we know when the cpu is misspeculating.Ali Saidi
2015-01-22mem: Clean up Request initialisationAndreas Hansson
2015-01-20cpu: commit probe notification on every microop or macroopNikos Nikoleris
2014-12-05cpu: Only check for PC events on instruction boundaries.Gabe Black
2014-12-02mem: Assume all dynamic packet data is array allocatedAndreas Hansson
2014-12-02mem: Add const getters for write packet dataAndreas Hansson
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-11-12arm: Fix timing wakeup with LLSCAli Saidi
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-10-16cpu: Probe points for basic PMU statsAndreas Sandberg
2014-09-27arch: Use const StaticInstPtr references where possibleAndreas Hansson
2014-09-20cpu: Remove unused deallocateContext callsMitch Hayenga
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