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Age
Commit message (
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Author
2012-01-17
MEM: Simplify ports by removing EventManager
Andreas Hansson
2012-01-17
CPU: Moving towards a more general port across CPU models
Andreas Hansson
2012-01-17
MEM: Add port proxies instead of non-structural ports
Andreas Hansson
2011-11-18
SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
Gabe Black
2011-11-01
SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
Gabe Black
2011-11-01
SE/FS: Expose the same methods on the CPUs in SE and FS modes.
Gabe Black
2011-09-19
Syscall: Make the syscall function available in both SE and FS modes.
Gabe Black
2011-09-09
Decode: Pull instruction decoding out of the StaticInst class into its own.
Gabe Black
2011-08-07
Translation: Use a pointer type as the template argument.
Gabe Black
2011-07-02
ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.
Gabe Black
2011-07-02
ExecContext: Get rid of the now unused read/write templated functions.
Gabe Black
2011-06-02
scons: rename TraceFlags to DebugFlags
Nathan Binkert
2011-05-04
CPU: Add some useful debug message to the timing simple cpu.
Ali Saidi
2011-05-04
CPU: Fix a case where timing simple cpu faults can nest.
Ali Saidi
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-03-17
ARM: Detect and skip udelay() functions in linux kernel.
Ali Saidi
2011-03-01
Spelling: Fix the a spelling error by changing mmaped to mmapped.
Gabe Black
2011-02-11
SimpleCPU: Fix a case where a DTLB fault redirects fetch and an I-side walk o...
Ali Saidi
2011-02-11
O3: Enhance data address translation by supporting hardware page table walkers.
Giacomo Gabrielli
2011-02-06
TimingSimpleCPU: split data sender state fix
Joel Hestness
2011-02-06
mcpat: Adds McPAT performance counters
Joel Hestness
2011-02-03
Config: Keep track of uncached and cached ports separately.
Gabe Black
2011-01-07
Replace curTick global variable with accessor functions.
Steve Reinhardt
2010-12-07
O3: Make all instructions that write a misc. register not perform the write u...
Giacomo Gabrielli
2010-11-15
O3: Make O3 support variably lengthed instructions.
Gabe Black
2010-11-15
CPU: Fix bug when a split transaction is issued to a faster cache
Ali Saidi
2010-11-08
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-09-30
CPU/Cache: Fix some errors exposed by valgrind
Ali Saidi
2010-09-13
CPU: Get rid of the now unnecessary getInst/setInst family of functions.
Gabe Black
2010-09-13
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Gabe Black
2010-08-31
CPU: Get rid of the unused ev5_trap function on the simple and checker CPUs.
Gabe Black
2010-08-25
CPU: Print out traces for faluting inst when the flag ExecFaulting is set
Ali Saidi
2010-08-23
CPU: Make Exec trace to print predication result (if false) for memory instru...
Min Kyu Jeong
2010-08-23
ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.
Min Kyu Jeong
2010-08-13
Merge with head.
Gabe Black
2010-08-13
CPU: Add readBytes and writeBytes functions to the exec contexts.
Gabe Black
2010-08-13
CPU: Tidy up endianness handling for mmapped "IPR"s.
Gabe Black
2010-08-12
TimingSimpleCPU: fix NO_ACCESS memory op handling
Joel Hestness
2010-06-14
stats: get rid of the never-really-used event stuff
Nathan Binkert
2010-06-03
Minor remote GDB cleanup.
Steve Reinhardt
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
CPU: Reset fetch offset after a exception
Ali Saidi
2010-06-02
ARM: Make the predecoder handle Thumb instructions.
Gabe Black
2010-03-23
cpu: get rid of uncached access "events"
Steve Reinhardt
2010-03-23
cpu: fix exec tracing memory corruption bug
Steve Reinhardt
2010-03-21
TimingSimpleCPU: Fixed uncacacheable request read bug
Brad Beckmann
2010-02-26
cpu_models: get rid of cpu_models.py and move the stuff into SCons
Nathan Binkert
2010-02-12
BaseDynInst: Make the TLB translation timing instead of atomic.
Timothy M. Jones
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