gem5 - gem5

Age	Commit message (Expand)	Author
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2011-04-15	includes: sort all includes	Nathan Binkert
2010-10-31	ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.	Gabe Black
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2010-08-23	CPU: Print out flatten-out register index as with IntRegs/FloatRegs traceflag	Min Kyu Jeong
2010-08-23	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	Min Kyu Jeong
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi
2010-06-02	Simple CPU: Make the FloatRegs trace flag do something.	Gabe Black
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-07-29	Simple CPU: Make the simple CPU handle the IntRegs trace flag.	Gabe Black
2009-07-08	Get rid of the unused get(Data\|Inst)Asid and (inst\|data)Asid functions.	Gabe Black
2009-07-08	Registers: Add a registers.hh file as an ISA switched header.	Gabe Black
2009-07-08	Registers: Eliminate the ISA defined RegFile class.	Gabe Black
2009-07-08	Registers: Move the PCs out of the ISAs and into the CPUs.	Gabe Black
2009-07-08	ARM, Simple CPU: Fix an index and add assert checks.	Gabe Black
2009-07-08	Registers: Eliminate the ISA defined integer register file.	Gabe Black
2009-07-08	Registers: Eliminate the ISA defined floating point register file.	Gabe Black
2009-07-08	Registers: Get rid of the float register width parameter.	Gabe Black
2009-07-08	Registers: Add an ISA object which replaces the MiscRegFile.	Gabe Black
2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert
2009-05-17	includes: sort includes again	Nathan Binkert
2009-05-17	types: Move stuff for global types into src/base/types.hh	Nathan Binkert
2009-04-15	Get rid of the Unallocated thread context state.	Steve Reinhardt
2009-04-08	tlb: Don't separate the TLB classes into an instruction TLB and a data TLB	Gabe Black
2009-02-27	Processes: Make getting and setting system call arguments part of a process o...	Gabe Black
2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black
2009-02-25	CPU: Get rid of translate... functions from various interface classes.	Gabe Black
2009-01-19	thread_context: move getSystemPtr so SE mode can get to it.	Nathan Binkert
2008-12-16	SPARC: Truncate syscall args and return values appropriately.	Gabe Black
2008-11-04	get rid of all instances of readTid() and getThreadNum(). Unify and eliminate	Lisa Hsu
2008-10-20	O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...	Ali Saidi
2008-10-12	Get rid of old RegContext code.	Gabe Black
2008-10-11	CPU: Eliminate the simPalCheck funciton.	Gabe Black
2008-10-11	CPU: Eliminate the hwrei function.	Gabe Black
2008-09-10	style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...	Ali Saidi
2008-07-01	Remove delVirtPort() and make getVirtPort() only return cached version.	Ali Saidi
2008-02-26	TLB: Make a TLB base class and put a virtual demapPage function in it.	Gabe Black
2007-11-15	Get MIPS simple regression working. Take out unecessary functions "setShadowS...	Korey Sewell
2007-11-13	Add in files from merge-bare-iron, get them compiling in FS and SE mode	Korey Sewell
2007-09-25	SPARC: Fix a stupid mistake which was breaking the SPARC regressions.	Gabe Black
2007-09-19	X86: Put in the foundation for x87 stack based fp registers.	Gabe Black
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
2007-07-26	X86: Fix argument register indexing.	Gabe Black
2007-06-22	mips import pt. 1	Korey Sewell
2007-05-28	Remove unnecessary include of physical.hh.	Steve Reinhardt
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2006-12-12	Merge zizzer:/bk/newmem/	Gabe Black
2006-12-12	Get rid of unused lock code.	Steve Reinhardt
2006-12-06	Flattening and syscallReturn fixes	Gabe Black
2006-11-19	Update Virtual and Physical ports.	Kevin Lim