index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
testers
/
traffic_gen
Age
Commit message (
Expand
)
Author
2014-09-20
cpu: Update DRAM traffic gen
Wendy Elsasser
2014-09-09
misc: Fix a number of unitialised variables and members
Andreas Hansson
2014-09-03
base: Use the global Mersenne twister throughout
Andreas Hansson
2014-09-01
mem: change the namespace Message to ProtoMessage
Nilay Vaish
2014-08-10
cpu: Ensure the traffic generator suppresses non-memory packets
Andreas Hansson
2014-03-23
cpu: DRAM Traffic Generator
Neha Agarwal
2014-03-23
cpu: Add basic check to TrafficGen initial state
Stan Czerniawski
2014-01-29
cpu: fix bug when TrafficGen deschedules event
Xiangyu Dong
2013-08-19
cpu: Fix TrafficGen trace playback
Sascha Bischoff
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-05-30
cpu: Check that minimum TrafficGen period is less than max period
Sascha Bischoff
2013-05-30
cpu: Fix bug when reading in TrafficGen state transitions
Sascha Bischoff
2013-05-30
cpu: Add request elasticity to the traffic generator
Andreas Hansson
2013-05-30
cpu: Block traffic generator when requests have to retry
Andreas Hansson
2013-05-30
cpu: Move traffic generator sending out of generator states
Andreas Hansson
2013-05-30
cpu: Fold together the StateGraph and the TrafficGen
Andreas Hansson
2013-04-23
cpu: Fix TraceGen flag initalisation
Andreas Hansson
2013-04-22
cpu: Use request flags in trace playback
Andreas Hansson
2013-04-22
cpu: Make the generators usable outside the TrafficGen module
Andreas Hansson
2013-03-12
cpu: Fix state transition bug in the traffic generator
Andreas Sandberg
2013-02-19
scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
Andreas Hansson
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-01-07
cpu: Share the send functionality between traffic generators
Andreas Hansson
2013-01-07
cpu: Add support for protobuf input for the trace generator
Andreas Hansson
2013-01-07
cpu: Encapsulate traffic generator input in a stream
Andreas Hansson
2013-01-07
cpu: Fix the traffic gen read percentage
Andreas Hansson
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-09-21
TrafficGen: Add a basic traffic generator
Andreas Hansson