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Author
2014-01-29
cpu: fix bug when TrafficGen deschedules event
Xiangyu Dong
2013-08-19
cpu: Fix TrafficGen trace playback
Sascha Bischoff
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-05-30
cpu: Check that minimum TrafficGen period is less than max period
Sascha Bischoff
2013-05-30
cpu: Fix bug when reading in TrafficGen state transitions
Sascha Bischoff
2013-05-30
cpu: Add request elasticity to the traffic generator
Andreas Hansson
2013-05-30
cpu: Block traffic generator when requests have to retry
Andreas Hansson
2013-05-30
cpu: Move traffic generator sending out of generator states
Andreas Hansson
2013-05-30
cpu: Fold together the StateGraph and the TrafficGen
Andreas Hansson
2013-04-23
cpu: Fix TraceGen flag initalisation
Andreas Hansson
2013-04-22
cpu: Use request flags in trace playback
Andreas Hansson
2013-04-22
cpu: Make the generators usable outside the TrafficGen module
Andreas Hansson
2013-03-12
cpu: Fix state transition bug in the traffic generator
Andreas Sandberg
2013-02-19
scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
Andreas Hansson
2013-02-19
mem: Add predecessor to SenderState base class
Andreas Hansson
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-01-17
ruby: remove calls to g_system_ptr->getTime()
Nilay Vaish
2013-01-07
cpu: Share the send functionality between traffic generators
Andreas Hansson
2013-01-07
cpu: Add support for protobuf input for the trace generator
Andreas Hansson
2013-01-07
cpu: Encapsulate traffic generator input in a stream
Andreas Hansson
2013-01-07
cpu: Fix the traffic gen read percentage
Andreas Hansson
2012-12-11
ruby: modify the directed tester to read/write streams
Nilay Vaish
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-10-15
memtest: move check on outstanding requests
Nilay Vaish
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-09-21
TrafficGen: Add a basic traffic generator
Andreas Hansson
2012-09-11
Ruby: Use uint8_t instead of uint8 everywhere
Nilay Vaish
2012-08-28
Clock: Add a Cycles wrapper class and use where applicable
Andreas Hansson
2012-08-28
Clock: Rework clocks to avoid tick-to-cycle transformations
Andreas Hansson
2012-08-27
Ruby: Remove RubyEventQueue
Nilay Vaish
2012-08-21
Clock: Move the clock and related functions to ClockedObject
Andreas Hansson
2012-07-10
ruby: remove the cpu assumptions for the random tester
Brad Beckmann
2012-06-05
sim: Remove FastAlloc
Ali Saidi
2012-05-30
Packet: Unify the use of PortID in packet and port
Andreas Hansson
2012-05-01
MEM: Separate requests and responses for timing accesses
Andreas Hansson
2012-04-25
MEM: Add the PortId type and a corresponding id field to Port
Andreas Hansson
2012-04-14
Ruby: Use MasterPort base-class pointers where possible
Andreas Hansson
2012-04-14
MEM: Remove the Broadcast destination from the packet
Andreas Hansson
2012-04-14
MEM: Separate snoops and normal memory requests/responses
Andreas Hansson
2012-04-06
rubytest: remove spurious printf
Brad Beckmann
2012-04-06
rubytest: seperated read and write ports.
Brad Beckmann
2012-04-05
NetworkTest: remove unnecessary memory allocation
Tushar Krishna
2012-03-30
MEM: Introduce the master/slave port sub-classes in C++
William Wang
2012-03-22
Scons: Remove Werror=False in SConscript files
Andreas Hansson
2012-02-24
Ruby: Simplify tester ports by not using SimpleTimingPort
Andreas Hansson
2012-02-24
MEM: Move all read/write blob functions from Port to PortProxy
Andreas Hansson
2012-02-24
MEM: Move port creation to the memory object(s) construction
Andreas Hansson
2012-02-13
MEM: Introduce the master/slave port roles in the Python classes
Andreas Hansson
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
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