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Age
Commit message (
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Author
2016-03-20
cpu: warn if TrafficGen is suppressing a large numer of packets
Andreas Hansson
2016-02-24
cpu: TraceGen fix for tick frequency check
Matteo Andreozzi
2016-02-06
style: remove trailing whitespace
Steve Reinhardt
2015-07-20
ruby: more flexible ruby tester support
Brad Beckmann
2015-11-22
cpu: Fix memory leak in traffic generator
Andreas Hansson
2015-10-12
misc: Add explicit overrides and fix other clang >= 3.5 issues
Andreas Hansson
2015-10-12
misc: Remove redundant compiler-specific defines
Andreas Hansson
2015-08-29
ruby: eliminate type uint64 and int64
Nilay Vaish
2015-08-19
ruby: reverts to changeset: bf82f1f7b040
Nilay Vaish
2015-08-14
ruby: eliminate type uint64 and int64
Nilay Vaish
2015-08-14
ruby: replace Address by Addr
Nilay Vaish
2015-08-11
ruby: drop some redundant includes
Nilay Vaish
2015-07-10
ruby: replace global g_abs_controls with per-RubySystem var
Brandon Potter
2015-07-07
sim: Refactor and simplify the drain API
Andreas Sandberg
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2015-03-19
cpu: Fix TrafficGen message format
Wendy Elsasser
2015-03-02
mem: Split port retry for all different packet classes
Andreas Hansson
2015-03-02
cpu: Add a PC-value to the traffic generator requests
Stephan Diestelhorst
2015-02-16
cpu: TrafficGen sinks snoops without complaining
Andreas Hansson
2015-02-11
cpu: Tidy up the MemTest and make false sharing more obvious
Andreas Hansson
2015-01-22
mem: Clean up Request initialisation
Andreas Hansson
2014-12-02
mem: Assume all dynamic packet data is array allocated
Andreas Hansson
2014-12-02
mem: Add const getters for write packet data
Andreas Hansson
2014-12-02
mem: Remove null-check bypassing in Packet::getPtr
Andreas Hansson
2014-09-27
misc: Fix a bunch of minor issues identified by static analysis
Andreas Hansson
2014-09-20
cpu: Update DRAM traffic gen
Wendy Elsasser
2014-09-19
misc: Use safe_cast when assumptions are made about return value
Andreas Hansson
2014-09-09
misc: Fix a number of unitialised variables and members
Andreas Hansson
2014-09-03
base: Use the global Mersenne twister throughout
Andreas Hansson
2014-09-01
mem: change the namespace Message to ProtoMessage
Nilay Vaish
2014-09-01
ruby: eliminate type Time
Nilay Vaish
2014-08-10
cpu: Ensure the traffic generator suppresses non-memory packets
Andreas Hansson
2014-03-23
cpu: DRAM Traffic Generator
Neha Agarwal
2014-03-23
cpu: Add basic check to TrafficGen initial state
Stan Czerniawski
2014-01-29
cpu: fix bug when TrafficGen deschedules event
Xiangyu Dong
2013-08-19
cpu: Fix TrafficGen trace playback
Sascha Bischoff
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-05-30
cpu: Check that minimum TrafficGen period is less than max period
Sascha Bischoff
2013-05-30
cpu: Fix bug when reading in TrafficGen state transitions
Sascha Bischoff
2013-05-30
cpu: Add request elasticity to the traffic generator
Andreas Hansson
2013-05-30
cpu: Block traffic generator when requests have to retry
Andreas Hansson
2013-05-30
cpu: Move traffic generator sending out of generator states
Andreas Hansson
2013-05-30
cpu: Fold together the StateGraph and the TrafficGen
Andreas Hansson
2013-04-23
cpu: Fix TraceGen flag initalisation
Andreas Hansson
2013-04-22
cpu: Use request flags in trace playback
Andreas Hansson
2013-04-22
cpu: Make the generators usable outside the TrafficGen module
Andreas Hansson
2013-03-12
cpu: Fix state transition bug in the traffic generator
Andreas Sandberg
2013-02-19
scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
Andreas Hansson
2013-02-19
mem: Add predecessor to SenderState base class
Andreas Hansson
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
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