gem5 - gem5

Age	Commit message (Expand)	Author
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
2007-06-22	mips import pt. 1	Korey Sewell
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2007-02-28	Make trap instructions always generate TrapInstruction Fault objects which ca...	Gabe Black
2006-12-06	Merge zizzer:/bk/newmem	Gabe Black
2006-12-06	Flattening and syscallReturn fixes	Gabe Black
2006-11-29	Change the connecting of the physPort and virtPort to the memory object below...	Kevin Lim
2006-11-17	Make an initialization pass for the thread context and set the [phys,virt]Por...	Ron Dreslinski
2006-11-07	Moved the switched version of kernel_stats.hh back to kern, and moved the bas...	Gabe Black
2006-11-03	Got rid of "inPalMode". Some places are still effectively checking if they ar...	Gabe Black
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...	Gabe Black
2006-10-31	Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...	Gabe Black
2006-08-11	Pushed most of constants.hh back into isa_traits.hh and regfile.hh and create...	Gabe Black
2006-07-07	Fix so that O3CPU doesnt segfault on exit.	Korey Sewell
2006-07-03	Fix for FS O3CPU compile ... missing forward class declaration/header file af...	Korey Sewell
2006-06-12	Removed syscall function from thread_context.hh. ThreadContext is the interf...	Kevin Lim
2006-06-11	Fix compiling for SPARC_SE:	Ali Saidi
2006-06-07	Move checker's exec_context.hh to match the other changes. Also add in some ...	Kevin Lim
2006-06-06	Change ExecContext to ThreadContext. This is being renamed to differentiate ...	Kevin Lim