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path: root/src/cpu/translation.hh
AgeCommit message (Expand)Author
2015-02-11sim: Move the BaseTLB to src/arch/generic/Andreas Sandberg
2014-09-19arch: Pass faults by const reference where possibleAndreas Hansson
2014-04-23cpu: Fix setTranslateLatency() bug for squashed instructionsMitchell Hayenga
2014-01-24mem: track per-request latencies and access depths in the cache hierarchyMatt Horsnell
2012-09-25ARM: Squash outstanding walks when instructions are squashed.Ali Saidi
2011-08-07Translation: Use a pointer type as the template argument.Gabe Black
2011-02-11O3: Enhance data address translation by supporting hardware page table walkers.Giacomo Gabrielli
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-03-25CPU: Added comments to address translation classes.Timothy M. Jones
2010-02-12BaseDynInst: Make the TLB translation timing instead of atomic.Timothy M. Jones