gem5 - gem5

Age	Commit message (Expand)	Author
2017-07-05	cpu: Result refactoring	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Simplify the rename interface and use RegId	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Physical register structural + flat indexing	Nathanael Premillieu
2017-07-05	arch, cpu: Architectural Register structural indexing	Nathanael Premillieu
2017-06-20	cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper	Sean Wilson
2017-05-15	cpu: fix problem with forwarding and locked load	Alec Roelke
2017-05-02	python: Use PyBind11 instead of SWIG for Python wrappers	Andreas Sandberg
2017-04-03	arm, kvm: implement GIC state transfer	Curtis Dunham
2017-03-16	cpu: Print progress messages in Trace CPU	Radhika Jagtap
2017-02-27	syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...	Brandon Potter
2015-07-20	syscall_emul: [patch 13/22] add system call retry capability	Brandon Potter
2017-02-14	sim, kvm: make KvmVM a System parameter	Curtis Dunham
2016-11-09	style: [patch 3/22] reduce include dependencies in some headers	Brandon Potter
2016-11-09	style: [patch 1/22] use /r/3648/ to reorganize includes	Brandon Potter
2017-01-03	sim: Remove redundant export_method_cxx_predecls	Andreas Sandberg
2016-12-21	cpu: implement an L-TAGE branch predictor	Arthur Perais
2016-12-21	cpu: disallow speculative update of branch predictor tables (o3)	Arthur Perais
2016-12-21	cpu: correct comments in tournament branch predictor	Arthur Perais
2016-12-21	cpu: Resolve targets of predicted 'taken' decode for O3	Arthur Perais
2016-12-21	cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3	Arthur Perais
2016-12-05	cpu: Change traffic generators to use different values for writes	Nikos Nikoleris
2016-11-30	arch: [Patch 1/5] Added RISC-V base instruction set RV64I	Alec Roelke
2016-11-30	cpu: Remove branch predictor function predictInOrder	Jason Lowe-Power
2016-10-15	cpu, arm: Distinguish Float* and SimdFloat, create FloatMem opClass	Fernando Endo
2016-10-06	ruby: rename networktest to garnet_synthetic_traffic.	Tushar Krishna
2016-09-22	cpu: Fix the O3 CPU Drain	Rekai Gonzalez-Alberquilla
2016-09-15	cpu: Support exit when any one Trace CPU completes replay	Radhika Jagtap
2016-09-15	cpu: Adjust for trace offset and fix stats	Radhika Jagtap
2016-09-15	cpu: Add frequency scaling to the Trace CPU	Radhika Jagtap
2016-09-13	kvm: Support timing accesses for KVM cpu	Michael LeBeane
2016-09-13	sim: Refactor quiesce and remove FS asserts	Michael LeBeane
2016-08-22	cpu, mem, sim: Change how KVM maps memory	David Hashe
2016-08-15	cpu: Add missing override in Minor's exec context	Andreas Sandberg
2016-08-15	cpu: Fixed clang errors. Added 'override' keyword for virtual functions.	Reiley Jeapaul
2016-08-15	cpu, arch: fix the type used for the request flags	Nikos Nikoleris
2016-07-21	cpu: Fix Minor SMT WFI/drain interaction issues	Mitch Hayenga
2016-07-21	cpu: Add SMT support to MinorCPU	Mitch Hayenga
2016-06-20	mem: Resolve TrafficGen trace relative to the config	Andreas Sandberg
2016-06-06	pwr: Low-power idle power state for idle CPUs	David Guillen Fandos
2016-06-06	stats: Fixing regStats function for some SimObjects	David Guillen Fandos
2016-06-06	sim: Call regStats of base-class as well	Stephan Diestelhorst
2016-05-27	cpu: fix lastStopped unserialisation	Ilias Vougioukas
2016-05-26	cpu: Add a basic progress check to the TrafficGen	Andreas Hansson
2016-04-07	mem: Remove threadId from memory request class	Mitch Hayenga
2016-04-05	cpu: Implement per-thread GHRs	Mitch Hayenga
2016-04-05	cpu: Add an indirect branch target predictor	Mitch Hayenga
2016-04-05	cpu: Fix BTB threading oversight	Mitch Hayenga
2016-04-07	Revert to 74c1e6513bd0 (sim: Thermal support for Linux)	Andreas Sandberg
2016-04-06	Revert power patch sets with unexpected interactions	Andreas Sandberg
2016-04-05	mem: Remove threadId from memory request class	Mitch Hayenga