index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
Age
Commit message (
Expand
)
Author
2016-04-07
mem: Remove threadId from memory request class
Mitch Hayenga
2016-04-05
cpu: Implement per-thread GHRs
Mitch Hayenga
2016-04-05
cpu: Add an indirect branch target predictor
Mitch Hayenga
2016-04-05
cpu: Fix BTB threading oversight
Mitch Hayenga
2016-04-07
Revert to 74c1e6513bd0 (sim: Thermal support for Linux)
Andreas Sandberg
2016-04-06
Revert power patch sets with unexpected interactions
Andreas Sandberg
2016-04-05
mem: Remove threadId from memory request class
Mitch Hayenga
2016-04-05
cpu: Implement per-thread GHRs
Curtis Dunham
2016-04-05
cpu: Add an indirect branch target predictor
Mitch Hayenga
2016-04-05
cpu: Fix BTB threading oversight
Mitch Hayenga
2014-12-09
power: Low-power idle power state for idle CPUs
Akash Bagdia
2014-11-18
power: Add power states to ClockedObject
Akash Bagdia
2016-04-05
cpu: Add instruction opclass histogram to minor
Mitch Hayenga
2016-04-05
cpu: Query CPU for inst executed from Python
Geoffrey Blake
2016-03-30
kvm: Add an option to force context sync on kvm entry/exit
Andreas Sandberg
2016-03-20
cpu: warn if TrafficGen is suppressing a large numer of packets
Andreas Hansson
2015-05-05
cpu: Change literal integer constants to meaningful labels
Rekai Gonzalez Alberquilla
2015-11-27
kvm: Shutdown KVM and disconnect performance counters on fork
Andreas Sandberg
2015-11-27
base: Add support for changing output directories
Andreas Sandberg
2015-08-10
mem, cpu: Add assertions to snoop invalidation logic
Stephan Diestelhorst
2015-07-19
cpu: Fix LLSC atomic CPU wakeup
Krishnendra Nathella
2016-02-24
cpu: TraceGen fix for tick frequency check
Matteo Andreozzi
2016-02-23
scons: Add missing override to appease clang
Andreas Hansson
2016-02-15
misc: Add missing overrides to appease clang
Andreas Hansson
2016-02-10
mem: Deduce if cache should forward snoops
Andreas Hansson
2016-02-06
style: eliminate explicit boolean comparisons
Steve Reinhardt
2016-02-06
style: fix missing spaces in control statements
Steve Reinhardt
2016-02-06
style: remove trailing whitespace
Steve Reinhardt
2016-01-17
cpu. arch: add initiateMemRead() to ExecContext interface
Steve Reinhardt
2016-01-17
cpu: remove unnecessary data ptr from O3 internal read() funcs
Steve Reinhardt
2016-01-11
scons: Enable -Wextra by default
Andreas Hansson
2015-12-31
mem: Make cache terminology easier to understand
Andreas Hansson
2015-07-20
ruby: more flexible ruby tester support
Brad Beckmann
2015-12-07
cpu: Support virtual addr in elastic traces
Radhika Jagtap
2015-12-07
cpu: Create record type enum for elastic traces
Radhika Jagtap
2015-12-07
cpu: Add TraceCPU to playback elastic traces
Radhika Jagtap
2015-12-07
proto, probe: Add elastic trace probe to o3 cpu
Radhika Jagtap
2015-12-07
probe: Add probe in Fetch, IEW, Rename and Commit
Radhika Jagtap
2015-12-04
cpu: fix unitialized variable which may cause assertion failure
Pau Cabre
2015-11-22
cpu: Fix base FP and CC register index in o3 insertThread()
Nathanael Premillieu
2015-11-22
cpu: Fix memory leak in traffic generator
Andreas Hansson
2015-11-20
cpu: Enforce 1 interrupt controller per thread
Andreas Sandberg
2015-11-16
o3: drop unused statistic wbPenalized and wbPenalizedRate
Nilay Vaish
2015-10-12
misc: Add explicit overrides and fix other clang >= 3.5 issues
Andreas Hansson
2015-10-12
misc: Remove redundant compiler-specific defines
Andreas Hansson
2015-10-09
isa: Add parameter to pick different decoder inside ISA
Rekai Gonzalez Alberquilla
2015-10-06
sim: add ExecMacro to Exec* compound debug flags
Steve Reinhardt
2015-09-30
base: remove Trace::enabled flag
Curtis Dunham
2015-09-30
cpu,isa,mem: Add per-thread wakeup logic
Mitch Hayenga
2015-09-30
isa,cpu: Add support for FS SMT Interrupts
Mitch Hayenga
[next]