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2008-02-06Make the Event::description() a const functionStephen Hines
--HG-- extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-05Add base ARM code to M5Stephen Hines
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2008-01-14The reason is that the event is supposed to put the instructions ready to ↵Ke Meng
execute for next cycle. And the FUCompletion event has a lower priority than CPU tick event. It is called after the iew->tick() for current cycle has already been executed and the issueToExecuteQueue has already advanced this time. And assume the issueToExecuteLatency is 1, to catch up, the increasement should be made at access(-1) instead of access(0). Otherwise I found it could increase the actual op_latency of the instructions to execute by 1 cycle and potentially put the simulated CPU into a permanent idle state. Signed-off by: Ali Saidi <saidi@eecs.umich.edu> --HG-- extra : convert_revision : dafc16814383e8e8f8320845edf6ab2bcfed1e1d
2008-01-02Add ReadRespWithInvalidate to handle multi-level coherence situationSteve Reinhardt
where we defer a response to a read from a far-away cache A, then later defer a ReadExcl from a cache B on the same bus as us. We'll assert MemInhibit in both cases, but in the latter case MemInhibit will keep the invalidation from reaching cache A. This special response tells cache A that it gets the block to satisfy its read, but must immediately invalidate it. --HG-- extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b
2008-01-02Additional comments and helper functions for PrintReq.Steve Reinhardt
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2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
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2007-12-18Checkpointing: Fix a bug in the simulation script when restoring without ↵Ali Saidi
standard switch and change some ifs to work with the default port since every port is now connected to something. --HG-- extra : convert_revision : 72507cf13e58465291b0dce6322e853bee5a2b89
2007-12-16CPU: Update where the simple cpus read their cpu id from the thread context ↵Ali Saidi
to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations. --HG-- extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
2007-11-21imported patch pagewalker.patchGabe Black
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2007-11-20Simple CPU fix simple mistake in translateDataWriteAddr.Gabe Black
--HG-- extra : convert_revision : 6a6a7d05f62d9d9868be0707e4dc186a5f7ecf7d
2007-11-15add thread id to misc. reg functionsKorey Sewell
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2007-11-15add MicroPC functions back to thread contextKorey Sewell
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2007-11-15add microPC stuff back in. got deleted on changeset propragation somehow.Korey Sewell
--HG-- extra : convert_revision : 5e89484b2ef21457ffba35ef959df999a28c5676
2007-11-15put the flattenIndex stuff back in O3 AND put fatal() back in faultsKorey Sewell
--HG-- extra : convert_revision : 16fb8d7f3fbc5f8f1fc3ed34427c3d90a3125ad0
2007-11-15add core specific parameter to BaseCPU paramsKorey Sewell
--HG-- extra : convert_revision : 15c5995e3acf23a45c712891fd06ef273584f7e8
2007-11-15Get MIPS simple regression working. Take out unecessary functions ↵Korey Sewell
"setShadowSet", "CacheOp" --HG-- extra : convert_revision : a9ae8a7e62c27c2db16fd3cfa7a7f0bf5f0bf8ea
2007-11-15branch mergeKorey Sewell
--HG-- extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec
2007-11-13Add in files from merge-bare-iron, get them compiling in FS and SE modeKorey Sewell
--HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-12X86: Separate out the page table walker into it's own cc and hh.Gabe Black
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2007-11-12X86: Work on the page table walker, TLB, and related faults.Gabe Black
--HG-- extra : convert_revision : 9edde958b7e571c07072785f18f9109f73b8059f
2007-11-12X86: Implement a page table walker.Gabe Black
--HG-- extra : convert_revision : 36bab5750100318faa9ba7178dc2e38590053aec
2007-11-12X86: Make the micropc available through the thread context objects.Gabe Black
This is necssary for fault handlers that branch to non-zero micro PCs. --HG-- extra : convert_revision : c1cb4863d779a9f4a508d0b450e64fb7a985f264
2007-11-08TimingSimpleCPU: Add some DPRINTFs when the cpu suspends and resumes.Ali Saidi
--HG-- extra : convert_revision : a305cf9dcaca5ed3b97499a5e24c511f4416125a
2007-11-08AtomicSimpleCPU: Refactor resume() code to have a cleaner control path.Ali Saidi
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2007-11-08Interrupts: Inline some code and remove duplication.Ali Saidi
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2007-11-08CPU: Add function to explictly compare thread contexts after copying.Ali Saidi
--HG-- extra : convert_revision : 9b7af59a11202a91409aad7c427b7749cd1d2f12
2007-11-06O3: Remove unneeded variable.Gabe Black
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2007-10-31String constant const-ness changes to placate g++ 4.2.Steve Reinhardt
Also some bug fixes in MIPS ISA uncovered by g++ warnings (Python string compares don't work in C++!). --HG-- extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one ↵Ali Saidi
file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-22CPU: Add functions to the "ExecContext"s that translate a given address.Gabe Black
--HG-- extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
2007-10-18CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.Ali Saidi
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2007-10-02Merge with head.Gabe Black
--HG-- extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
2007-10-02Predecoder: Clear out predecoder state on an ITLB fault.Gabe Black
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2007-10-02CPU: Make the cpuid parameter get set in SE mode as well.Gabe Black
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2007-10-02CPU: Make the cpus check the pc event queues in SE mode.Gabe Black
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2007-10-02CPU: Make sure the system parameter gets set in the cpu builders. Other ↵Gabe Black
parameters need to be fixed as well. --HG-- extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
2007-10-01CPU: fix sparc_fs booting with SimpleTimingCPU.Ali Saidi
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2007-09-28Update stats for quiesced cyclesAli Saidi
--HG-- extra : convert_revision : 703ba58f156c9f2677b020f05d36bc1e3ae0b9e5
2007-09-28Rename cycles() function to ticks()Ali Saidi
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2007-09-28Update statistics to use cycles properly instead of ticksAli Saidi
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2007-09-25Merge with head.Gabe Black
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2007-09-25SPARC: Fix a stupid mistake which was breaking the SPARC regressions.Gabe Black
--HG-- extra : convert_revision : 34a11df0d467ea249211dd3aba86bc8d2aea45de
2007-09-24X86: Get X86_FS to compile.Gabe Black
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2007-09-19X86: Put in the foundation for x87 stack based fp registers.Gabe Black
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2007-09-04X86/StateTrace: Make m5 and statetrace track mmx and xmm registers, and ↵Gabe Black
actually compare xmm. --HG-- extra : convert_revision : 02c6641200edb133c9bc11f1fdf3c1a0b1c87e77
2007-08-31X86: Get x86 to compile again after the simobject constructor change.Gabe Black
--HG-- extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
2007-08-30Fix miscellaneous small typos.Miles Kaufmann
--HG-- extra : convert_revision : bfc0ac8e1c8a5d01d9fa5203184bbf99c8361da3
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-26Merge with headGabe Black
--HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26O3 CPU: Remove alignment check from dynamic instruction read/write functions.Gabe Black
--HG-- extra : convert_revision : e5d415b4bf79353ef3c9f4dc5af09ab4102c55fb
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