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2009-05-05cpus: fix cpu progress eventKorey Sewell
this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting progress events through repeatEvent flag and also changing the interval of the progress event as well
2009-04-21arm: Unify the ARM tlb. We forgot about this when we did the rest.Nathan Binkert
This code compiles, but there are no tests still
2009-04-20request: rename INST_READ to INST_FETCH.Steve Reinhardt
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19CPUs: Make the atomic CPU support locked memory accesses.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-19CPU: If the simple CPU is already idle, just return from suspendContext, ↵Gabe Black
don't assert.
2009-04-18o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ↵Korey Sewell
stage was not setting the predicted PC correctly or passing that information back to fetch correctly
2009-04-17o3, inorder: fix FS bug due to initializing ThreadState to Halted.Steve Reinhardt
For some reason o3 FS init() only called initCPU if the thread state was Suspended, which was no longer the case. There's no apparent reason to check, so I whacked the test completely rather than changing the check to Halted. The inorder init() was also updated to be symmetric, though the previous code was just a fancy no-op.
2009-04-15o3: handle fetch with no active threads correctly.Steve Reinhardt
This situation can arise now on the first fetch cycle after the last active thread is halted. It seems easy enough to deal with when it happens rather than trying to avoid it.
2009-04-15o3: fix {read,set}ArchFloatReg* functions.Steve Reinhardt
Register indices were not being calculated properly.
2009-04-15ThreadState: initialize status to Halted in constructor.Steve Reinhardt
This provides a common initial status for all threads independent of CPU model (unlike the prior situation where CPUs initialized threads to inconsistent states). This mostly matters for SE mode; in FS mode, ISA-specific startupCPU() methods generally handle boot-time initialization of thread contexts (since the right thing to do is ISA-dependent).
2009-04-15Get rid of the Unallocated thread context state.Steve Reinhardt
Basically merge it in with Halted. Also had to get rid of a few other functions that called ThreadContext::deallocate(), including: - InOrderCPU's setThreadRescheduleCondition. - ThreadContext::exit(). This function was there to avoid terminating simulation when one thread out of a multi-thread workload exits, but we need to find a better (non-cpu-centric) way.
2009-04-08tlb: More fixing of unified TLBNathan Binkert
2009-04-08tlb: Don't separate the TLB classes into an instruction TLB and a data TLBGabe Black
2009-03-11cpu: fix minor endian issue with trace outputSteve Reinhardt
(no functional change)
2009-03-07stats: fix duplicate statistics names.Nathan Binkert
This generally requires providing a more meaningful name() function for a class.
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-03-05Get rid of 'using namespace' declarations in headers.Steve Reinhardt
2009-03-04InOrderCPU: Clean up Constructors to initialize variables correctly (i.e. in ↵Korey Sewell
a way for the compiler to play *nice*)
2009-03-04Give each resource in InOrder it's own TraceFlag instead of just standard ↵Korey Sewell
'Resource' flag
2009-03-04Remove unused functions/comments cluttering up the code.Korey Sewell
2009-03-04make handling of interstage buffers (i.e. StageQueues) more consistent: ↵Korey Sewell
(1)number from 0-n, not 1-n+1, (2) always check nextStageValid before a stageNum+1 and prevStageValid for a stageNum-1 reference (3) add skidSize() to get StageQueue size for all threads
2009-03-04 InOrder didnt have all it's params set to a default value, which is now ↵Korey Sewell
required for M5 objects; Also, a # of values need to be reset to 0 (or the appropriate value) before we assume they are OK for use.
2009-03-04Give TimeBuffer an ID that can be set. Necessary because InOrder uses ↵Korey Sewell
generic stages so w/o an ID there is no way to differentiate buffers when debugging
2009-03-04use numCycles instead of simTicks to determine CPI stat in InOrderKorey Sewell
2009-03-04O3: Make numThreads error message more helpful.Steve Reinhardt
2009-02-27Processes: Make getting and setting system call arguments part of a process ↵Gabe Black
object.
2009-02-26CPA: Add code to automatically record function symbols as CPU executes.Ali Saidi
2009-02-25CPU: Only look up the nearest symbol in the kernel if you're actually in ↵Gabe Black
kernel code.
2009-02-25CPU: Add a flag to identify a read barrier to the static inst class.Gabe Black
2009-02-25CPU: Don't fetch when executing a macroop.Gabe Black
If the CPL changes mid macroop, the end of the instruction might not be priveleged enough to execute the beginning.
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert ↵Gabe Black
the timing simple CPU to use it.
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-23debug: Move debug_break into src/baseNathan Binkert
2009-02-20Remove unnecessary building of FreeList/RenameMap in InOrder. Clean-up ↵Korey Sewell
comments and O3 extensions InOrder Thread Context
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
Apparently we broke it with the cache rewrite and never noticed. Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part of these changes (and for inspiring me to work on the rest). Some other overdue cleanup on the prefetch code too.
2009-02-10styleNathan Binkert
2009-02-10Configs: Add support for the InOrder CPU modelKorey Sewell
2009-02-10InOrder: Import new inorder CPU model from MIPS.Korey Sewell
This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen!
2009-02-10ExeTrace: Allow subclasses of the tracer to define their own prefix to dumpKorey Sewell
2009-02-10CPU: Prepare CPU models for the new in-order CPU model.Korey Sewell
Some new functions and forward declarations are necessary to make things work
2009-02-01CPU: Don't always reset the micro pc on faults. Let the faults handle it.Gabe Black
2009-02-01X86: Make sure the predecoder is cleared out for interrupts.Gabe Black
2009-01-30Config: Cause a fatal() when a parameter without a default value isn't ↵Ali Saidi
set(FS #315).
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
Make interrupts use the new wakeup method, and pull all of the interrupt stuff into the cpu base class so that only the wakeup code needs to be updated. I tried to make wakeup, wakeCPU, and the various other mechanisms for waking and sleeping a little more sane, but I couldn't understand why the statistics were changing the way they were. Maybe we'll try again some day.
2009-01-21o3cpu: give a name to the activity recorder for better tracingNathan Binkert
2009-01-19thread_context: move getSystemPtr so SE mode can get to it.Nathan Binkert
There was really no reason that it should be FS only.