| Age | Commit message (Expand) | Author |
|---|
| 2014-05-13 | mem: Refactor assignment of Packet types | Curtis Dunham |
| 2014-09-03 | cpu: Fix o3 drain bug | Mitch Hayenga |
| 2014-04-29 | arm: use condition code registers for ARM ISA | Curtis Dunham |
| 2014-09-03 | cpu: fix bimodal predictor to use correct global history reg | Dam Sunwoo |
| 2014-09-03 | cpu: Fix cache blocked load behavior in o3 cpu | Mitch Hayenga |
| 2014-09-03 | cpu: Fix o3 quiesce fetch bug | Mitch Hayenga |
| 2014-09-03 | cpu: Fix SMT scheduling issue with the O3 cpu | Mitch Hayenga |
| 2014-09-03 | cpu: Fix incorrect speculative branch predictor behavior | Mitch Hayenga |
| 2014-09-03 | cpu: Add a fetch queue to the o3 cpu | Mitch Hayenga |
| 2014-09-03 | cpu: Fix o3 front-end pipeline interlock behavior | Mitch Hayenga |
| 2014-09-03 | cpu: Change writeback modeling for outstanding instructions | Mitch Hayenga |
| 2014-09-03 | arch, cpu: Factor out the ExecContext into a proper base class | Andreas Sandberg |
| 2014-09-01 | mem: change the namespace Message to ProtoMessage | Nilay Vaish |
| 2014-09-01 | ruby: eliminate type Time | Nilay Vaish |
| 2014-08-13 | scons: Build the branch predictor for all CPUs | Andreas Sandberg |
| 2014-08-13 | cpu: Don't forward declare RefCountingPtr | Andreas Sandberg |
| 2014-08-13 | cpu: Modernise the branch predictor (STL and C++11) | Andreas Hansson |
| 2014-08-10 | cpu: Ensure the traffic generator suppresses non-memory packets | Andreas Hansson |
| 2014-07-23 | cpu: `Minor' in-order CPU model | Andrew Bardsley |
| 2014-06-30 | cpu: implement a bi-mode branch predictor | Anthony Gutierrez |
| 2014-06-21 | o3: make dispatch LSQ full check more selective | Binh Pham |
| 2014-06-21 | o3: split load & store queue full cases in rename | Binh Pham |
| 2014-05-31 | style: eliminate equality tests with true and false | Steve Reinhardt |
| 2014-05-23 | cpu: o3: remove stat totalCommittedInsts | Nilay Vaish |
| 2014-05-09 | cpu: Useful getters for ActivityRecorder | Andrew Bardsley |
| 2014-05-09 | cpu: Add flag name printing to StaticInst | Andrew Bardsley |
| 2014-05-09 | cpu: Timebuf const accessors | Andrew Bardsley |
| 2014-05-09 | arch, arm: Preserve TLB bootUncacheability when switching CPUs | Geoffrey Blake |
| 2014-05-09 | cpu: add more instruction mix statistics | Curtis Dunham |
| 2014-05-09 | cpu, arm: Allow the specification of a socket field | Akash Bagdia |
| 2014-04-23 | cpu: Fix setTranslateLatency() bug for squashed instructions | Mitchell Hayenga |
| 2014-04-01 | cpu: Fix case where o3 lsq could print out uninitialized data | Mitch Hayenga |
| 2014-04-23 | cpu: Add O3 CPU width checks | Dam Sunwoo |
| 2014-04-19 | o3: Fix occupancy checks for SMT | Faissal Sleiman |
| 2014-04-09 | kvm, x86: Add initial support for multicore simulation | Andreas Sandberg |
| 2014-03-25 | cpu: o3: lsq: Fix TSO implementation | Marco Elver |
| 2014-03-23 | cpu: DRAM Traffic Generator | Neha Agarwal |
| 2014-03-23 | cpu: Add basic check to TrafficGen initial state | Stan Czerniawski |
| 2014-03-16 | kvm: Clean up signal handling | Andreas Sandberg |
| 2014-03-16 | kvm: x86: Adjust PC to remove the CS segment base address | Andreas Sandberg |
| 2014-03-16 | kvm: x86: Add support for x86 INIT and STARTUP handling | Andreas Sandberg |
| 2014-03-12 | alpha: Small removal of dead comments/code from alpha ISA | Paul Rosenfeld |
| 2014-03-07 | cpu: Make CPU and ThreadContext getters const | Andreas Hansson |
| 2014-03-07 | scons: Fixes uninitialized warnings issued by clang | Mitch Hayenga |
| 2014-03-03 | kvm: x86: Always assume segments to be usable | Andreas Sandberg |
| 2014-03-03 | kvm: Initialize signal handlers from startupThread() | Andreas Sandberg |
| 2014-03-01 | cpu: Enable fast-forwarding for MIPS InOrderCPU and O3CPU | Christopher Torng |
| 2014-02-20 | kvm: Add support for multi-system simulation | Andreas Sandberg |
| 2014-02-09 | cpu: simple: Add support for using branch predictors | Andreas Sandberg |
| 2014-01-29 | cpu: fix bug when TrafficGen deschedules event | Xiangyu Dong |
