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path: root/src/cpu
AgeCommit message (Expand)Author
2016-06-20mem: Resolve TrafficGen trace relative to the configAndreas Sandberg
2016-06-06pwr: Low-power idle power state for idle CPUsDavid Guillen Fandos
2016-06-06stats: Fixing regStats function for some SimObjectsDavid Guillen Fandos
2016-06-06sim: Call regStats of base-class as wellStephan Diestelhorst
2016-05-27cpu: fix lastStopped unserialisationIlias Vougioukas
2016-05-26cpu: Add a basic progress check to the TrafficGenAndreas Hansson
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-05cpu: Implement per-thread GHRsMitch Hayenga
2016-04-05cpu: Add an indirect branch target predictorMitch Hayenga
2016-04-05cpu: Fix BTB threading oversightMitch Hayenga
2016-04-07Revert to 74c1e6513bd0 (sim: Thermal support for Linux)Andreas Sandberg
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2016-04-05cpu: Implement per-thread GHRsCurtis Dunham
2016-04-05cpu: Add an indirect branch target predictorMitch Hayenga
2016-04-05cpu: Fix BTB threading oversightMitch Hayenga
2014-12-09power: Low-power idle power state for idle CPUsAkash Bagdia
2014-11-18power: Add power states to ClockedObjectAkash Bagdia
2016-04-05cpu: Add instruction opclass histogram to minorMitch Hayenga
2016-04-05cpu: Query CPU for inst executed from PythonGeoffrey Blake
2016-03-30kvm: Add an option to force context sync on kvm entry/exitAndreas Sandberg
2016-03-20cpu: warn if TrafficGen is suppressing a large numer of packetsAndreas Hansson
2015-05-05cpu: Change literal integer constants to meaningful labelsRekai Gonzalez Alberquilla
2015-11-27kvm: Shutdown KVM and disconnect performance counters on forkAndreas Sandberg
2015-11-27base: Add support for changing output directoriesAndreas Sandberg
2015-08-10mem, cpu: Add assertions to snoop invalidation logicStephan Diestelhorst
2015-07-19cpu: Fix LLSC atomic CPU wakeupKrishnendra Nathella
2016-02-24cpu: TraceGen fix for tick frequency checkMatteo Andreozzi
2016-02-23scons: Add missing override to appease clangAndreas Hansson
2016-02-15misc: Add missing overrides to appease clangAndreas Hansson
2016-02-10mem: Deduce if cache should forward snoopsAndreas Hansson
2016-02-06style: eliminate explicit boolean comparisonsSteve Reinhardt
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2016-01-17cpu: remove unnecessary data ptr from O3 internal read() funcsSteve Reinhardt
2016-01-11scons: Enable -Wextra by defaultAndreas Hansson
2015-12-31mem: Make cache terminology easier to understandAndreas Hansson
2015-07-20ruby: more flexible ruby tester supportBrad Beckmann
2015-12-07cpu: Support virtual addr in elastic tracesRadhika Jagtap
2015-12-07cpu: Create record type enum for elastic tracesRadhika Jagtap
2015-12-07cpu: Add TraceCPU to playback elastic tracesRadhika Jagtap
2015-12-07proto, probe: Add elastic trace probe to o3 cpuRadhika Jagtap
2015-12-07probe: Add probe in Fetch, IEW, Rename and CommitRadhika Jagtap
2015-12-04cpu: fix unitialized variable which may cause assertion failurePau Cabre
2015-11-22cpu: Fix base FP and CC register index in o3 insertThread()Nathanael Premillieu
2015-11-22cpu: Fix memory leak in traffic generatorAndreas Hansson
2015-11-20cpu: Enforce 1 interrupt controller per threadAndreas Sandberg
2015-11-16o3: drop unused statistic wbPenalized and wbPenalizedRateNilay Vaish
2015-10-12misc: Add explicit overrides and fix other clang >= 3.5 issuesAndreas Hansson
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