gem5 - gem5

Age	Commit message (Expand)	Author
2011-11-18	SE/FS: Get rid of includes of config/full_system.hh.	Gabe Black
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-11-03	Ruby: Remove some unused typedefs	Nilay Vaish
2011-11-02	SE/FS: Get rid of FULL_SYSTEM in sim.	Gabe Black
2011-11-01	SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.	Gabe Black
2011-11-01	SE/FS: Expose the same methods on the CPUs in SE and FS modes.	Gabe Black
2011-10-31	SE/FS: Make the functions available from the TC consistent between SE and FS.	Gabe Black
2011-10-31	GCC: Get everything working with gcc 4.6.1.	Gabe Black
2011-10-30	SE/FS: Make getProcessPtr available in both modes, and get rid of FULL_SYSTEMs.	Gabe Black
2011-10-30	SE/FS: Build the base process class in FS.	Gabe Black
2011-10-16	SE/FS: Include getMemPort in FS.	Gabe Black
2011-10-16	SE/FS: Build/expose vport in SE mode.	Gabe Black
2011-10-16	ARM: Turn on the page table walker on ARM in SE mode.	Gabe Black
2011-10-16	CPU: Make physPort and getPhysPort available in SE mode.	Gabe Black
2011-10-13	X86: Turn on the page table walker in SE mode.	Gabe Black
2011-10-09	SE/FS: Build the Interrupt objects in SE mode.	Gabe Black
2011-09-30	SE/FS: Build the devices in SE mode.	Gabe Black
2011-09-27	O3: Tidy up some DPRINTFs in the LSQ.	Gabe Black
2011-09-27	Faults: Replace calls to genMachineCheckFault with M5PanicFault.	Gabe Black
2011-09-26	LSQ: Moved a couple of lines to enable O3 + Ruby	Nilay Vaish
2011-09-22	event: minor cleanup	Steve Reinhardt
2011-09-19	Syscall: Make the syscall function available in both SE and FS modes.	Gabe Black
2011-09-13	LSQ: Only trigger a memory violation with a load/load if the value changes.	Ali Saidi
2011-09-09	StaticInst: Merge StaticInst and StaticInstBase.	Gabe Black
2011-09-09	Decode: Pull instruction decoding out of the StaticInst class into its own.	Gabe Black
2011-08-19	LSQ: Set store predictor to periodically clear itself as recommended in the s...	Ali Saidi
2011-08-19	Fix bugs due to interaction between SEV instructions and O3 pipeline	Geoffrey Blake
2011-08-19	LSQ: Add some better dprintfs for storeset predictor.	Mrinmoy Ghosh
2011-08-19	LSQ: Fix a few issues with the storeset predictor.	Mrinmoy Ghosh
2011-08-19	O3: Squash the violator and younger instructions instead not all insts.	Giacomo Gabrielli
2011-08-16	InOrder: Make cache_unit.hh include hashmap.hh explicitly, not transitively.	Gabe Black
2011-08-16	O3: Make lsq_unit.hh include arch/isa_traits.hh directly, not transitively.	Gabe Black
2011-08-14	O3: When squashing, restore the macroop that should be used for fetching.	Gabe Black
2011-08-14	O3: Add a pointer to the macroop for a microop in the dyninst.	Gabe Black
2011-08-13	O3: At the end of an instruction, force fetchAddr to something sensible.	Gabe Black
2011-08-09	O3: Stop using the current macroop no matter why you're leaving it.	Gabe Black
2011-08-09	O3: When waiting to handle an interrupt, let everything drain out.	Gabe Black
2011-08-08	BuildEnv: Eliminate RUBY as build environment variable	Nilay Vaish
2011-08-07	O3: Get rid of the unused addToRemoveList function.	Gabe Black
2011-08-07	O3: Let squashed and deferred instructions issue.	Gabe Black
2011-08-07	O3: Fix uninitialized variable in the tournament branch predictor.	Ali Saidi
2011-08-07	Translation: Use a pointer type as the template argument.	Gabe Black
2011-08-02	O3: Get rid of the raw ExtMachInst constructor on DynInsts.	Gabe Black
2011-07-31	O3: Implement memory mapped IPRs for O3.	Gabe Black
2011-07-30	O3: Fix corner case squashing into the microcode ROM.	Gabe Black
2011-07-15	O3: Create a pipeline activity viewer for the O3 CPU model.	Giacomo Gabrielli
2011-07-10	Branch predictor: Fixes the tournament branch predictor.	Mrinmoy Ghosh
2011-07-10	O3: Fix up pipelining icache accesses in fetch stage to function properly	Geoffrey Blake
2011-07-10	O3: Make sure fetch doesn't go off into the weeds during speculation.	Ali Saidi
2011-07-02	ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.	Gabe Black