gem5 - gem5

Age	Commit message (Expand)	Author
2016-04-05	cpu: Query CPU for inst executed from Python	Geoffrey Blake
2016-03-30	kvm: Add an option to force context sync on kvm entry/exit	Andreas Sandberg
2016-03-20	cpu: warn if TrafficGen is suppressing a large numer of packets	Andreas Hansson
2015-05-05	cpu: Change literal integer constants to meaningful labels	Rekai Gonzalez Alberquilla
2015-11-27	kvm: Shutdown KVM and disconnect performance counters on fork	Andreas Sandberg
2015-11-27	base: Add support for changing output directories	Andreas Sandberg
2015-08-10	mem, cpu: Add assertions to snoop invalidation logic	Stephan Diestelhorst
2015-07-19	cpu: Fix LLSC atomic CPU wakeup	Krishnendra Nathella
2016-02-24	cpu: TraceGen fix for tick frequency check	Matteo Andreozzi
2016-02-23	scons: Add missing override to appease clang	Andreas Hansson
2016-02-15	misc: Add missing overrides to appease clang	Andreas Hansson
2016-02-10	mem: Deduce if cache should forward snoops	Andreas Hansson
2016-02-06	style: eliminate explicit boolean comparisons	Steve Reinhardt
2016-02-06	style: fix missing spaces in control statements	Steve Reinhardt
2016-02-06	style: remove trailing whitespace	Steve Reinhardt
2016-01-17	cpu. arch: add initiateMemRead() to ExecContext interface	Steve Reinhardt
2016-01-17	cpu: remove unnecessary data ptr from O3 internal read() funcs	Steve Reinhardt
2016-01-11	scons: Enable -Wextra by default	Andreas Hansson
2015-12-31	mem: Make cache terminology easier to understand	Andreas Hansson
2015-07-20	ruby: more flexible ruby tester support	Brad Beckmann
2015-12-07	cpu: Support virtual addr in elastic traces	Radhika Jagtap
2015-12-07	cpu: Create record type enum for elastic traces	Radhika Jagtap
2015-12-07	cpu: Add TraceCPU to playback elastic traces	Radhika Jagtap
2015-12-07	proto, probe: Add elastic trace probe to o3 cpu	Radhika Jagtap
2015-12-07	probe: Add probe in Fetch, IEW, Rename and Commit	Radhika Jagtap
2015-12-04	cpu: fix unitialized variable which may cause assertion failure	Pau Cabre
2015-11-22	cpu: Fix base FP and CC register index in o3 insertThread()	Nathanael Premillieu
2015-11-22	cpu: Fix memory leak in traffic generator	Andreas Hansson
2015-11-20	cpu: Enforce 1 interrupt controller per thread	Andreas Sandberg
2015-11-16	o3: drop unused statistic wbPenalized and wbPenalizedRate	Nilay Vaish
2015-10-12	misc: Add explicit overrides and fix other clang >= 3.5 issues	Andreas Hansson
2015-10-12	misc: Remove redundant compiler-specific defines	Andreas Hansson
2015-10-09	isa: Add parameter to pick different decoder inside ISA	Rekai Gonzalez Alberquilla
2015-10-06	sim: add ExecMacro to Exec* compound debug flags	Steve Reinhardt
2015-09-30	base: remove Trace::enabled flag	Curtis Dunham
2015-09-30	cpu,isa,mem: Add per-thread wakeup logic	Mitch Hayenga
2015-09-30	isa,cpu: Add support for FS SMT Interrupts	Mitch Hayenga
2015-09-30	cpu: Add per-thread monitors	Mitch Hayenga
2015-09-30	config,cpu: Add SMT support to Atomic and Timing CPUs	Mitch Hayenga
2015-09-30	cpu: Change thread assignments for heterogenous SMT	Mitch Hayenga
2015-09-15	cpu: pred: Local Predictor Reset in Tournament Predictor	Andrew Lukefahr
2015-09-15	cpu, o3: consider split requests for LSQ checksnoop operations	Hongil Yoon
2015-08-29	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-21	mem: Reflect that packet address and size are always valid	Andreas Hansson
2015-08-21	cpu: Move invldPid constant from Request to BaseCPU	Andreas Hansson
2015-08-19	ruby: reverts to changeset: bf82f1f7b040	Nilay Vaish
2015-08-14	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-14	ruby: replace Address by Addr	Nilay Vaish
2015-08-11	ruby: drop some redundant includes	Nilay Vaish
2015-08-07	base: Declare a type for context IDs	Andreas Sandberg