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AgeCommit message (Expand)Author
2013-10-17cpu: Fix O3 uncacheable load that is replayed but misses the TLBAli Saidi
2013-10-16kvm: Fix latency calculation of IPR accessesAndreas Sandberg
2013-10-15arch/x86: add support for explicit CC register fileYasuko Eckert
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-10-15cpu/o3: clean up rename map and free listSteve Reinhardt
2013-10-15cpu: rename *_DepTag constants to *_Reg_BaseSteve Reinhardt
2013-10-15cpu/o3: clean up scoreboard objectSteve Reinhardt
2013-10-15cpu/o3: clean up physical register fileSteve Reinhardt
2013-10-15cpu/inorder: merge register class enumsSteve Reinhardt
2013-10-15cpu: clean up architectural register classificationSteve Reinhardt
2013-10-03kvm: Service events in the instruction event queuesAndreas Sandberg
2013-09-30kvm: Add support for thread-specific instruction eventsAndreas Sandberg
2013-09-30kvm: FPU synchronization support on x86Andreas Sandberg
2013-09-30kvm: x86: Fix segment registers to make them VMX compatibleAndreas Sandberg
2013-09-25kvm: Add x86 segment register verification to help debuggingAndreas Sandberg
2013-09-25kvm: Initial x86 supportAndreas Sandberg
2013-09-19kvm: Correctly handle the return value from handleIpr(Read|Write)Andreas Sandberg
2013-09-19kvm: Fix a case where the run timers weren't armed properlyAndreas Sandberg
2013-09-11cpu: Dynamically instantiate O3 CPU LSQUnitsJoel Hestness
2013-09-04arch: Resurrect the NOISA build target and rename it NULLAndreas Hansson
2013-09-04cpu: Move the branch predictor out of the BaseCPUAndreas Hansson
2013-09-04arch: Header clean up for NOISA resurrectionAndreas Hansson
2013-08-20cpu: Fix timing CPU isDrained comment formattingAndreas Hansson
2013-08-19cpu: Accurately count idle cycles for simple cpuLena Olson
2013-08-19cpu: Fix TrafficGen trace playbackSascha Bischoff
2013-08-19cpu: Fix timing CPU drain checkAndreas Hansson
2013-08-19cpu: Fix a bug in the O3 CPU introduced by the cache line patchAndreas Hansson
2013-07-19cpu: Remove unused getBranchPred() method from BaseCPUAndreas Sandberg
2013-07-18mem: Set the cache line size on a system levelAndreas Hansson
2013-07-15debug : Fixes the issue wherein Debug symbols were not getting dumped into tr...Umesh Bhaskar
2013-06-27sim: Add the notion of clock domains to all ClockedObjectsAkash Bagdia
2013-06-27config: Remove redundant explicit setting of default clocksAkash Bagdia
2013-06-27cpu: Consider instructions waiting for FU completion in drainingAndreas Hansson
2013-06-18kvm: Use the address finalization code in the TLBAndreas Sandberg
2013-06-11kvm: Add more VM statsAndreas Sandberg
2013-06-11kvm: Separate host frequency from simulated CPU frequencyAndreas Sandberg
2013-06-11kvm: Don't handle IO and execute in the same tickAndreas Sandberg
2013-06-11kvm: Maintain a local instruction counter and update totalNumInstsAndreas Sandberg
2013-06-11cpu: Add support for scheduling multiple inst/load stop eventsAndreas Sandberg
2013-06-03kvm: Allow architectures to override the cycle accounting mechanismAndreas Sandberg
2013-06-03kvm: Add handling of EAGAIN when creating timersAndreas Sandberg
2013-06-03kvm: Add a call to thread->startup() in startup()Andreas Sandberg
2013-05-30cpu: Prune the stale TraceCPUAndreas Hansson
2013-05-30cpu: Check that minimum TrafficGen period is less than max periodSascha Bischoff
2013-05-30cpu: Fix bug when reading in TrafficGen state transitionsSascha Bischoff
2013-05-30cpu: Add request elasticity to the traffic generatorAndreas Hansson
2013-05-30cpu: Block traffic generator when requests have to retryAndreas Hansson
2013-05-30cpu: Move traffic generator sending out of generator statesAndreas Hansson
2013-05-30cpu: Fold together the StateGraph and the TrafficGenAndreas Hansson
2013-05-30cpu: Make hash struct instead of class to please clangAndreas Hansson
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