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2006-12-06Got rid of some typedefs, moved the tlbs to the base o3 cpu, and called the ↵Gabe Black
architecture defined setSyscallReturn function instead of a duplicate copy. src/cpu/o3/alpha/cpu.hh: Got rid of some typedefs, and moved the tlbs to the base o3 cpu. src/cpu/o3/alpha/thread_context.hh: src/cpu/o3/cpu.cc: Moved the tlbs to the base o3 cpu. --HG-- extra : convert_revision : 1805613aa230b8974a226ee3d2584c85f7a578aa
2006-12-06Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem src/cpu/o3/commit_impl.hh: Hand Merge --HG-- extra : convert_revision : 6984db90d5b5ec71c31f1c345f5a77eed540059e
2006-12-06Added a DPRINTF to print out the actual value pulled from memory.Gabe Black
--HG-- extra : convert_revision : 18780f753a7e98f8de3047dd6781b944b0826b4e
2006-12-06Flattening and syscallReturn fixesGabe Black
src/cpu/o3/thread_context_impl.hh: Use flattened indices src/cpu/simple_thread.hh: Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file. src/cpu/thread_context.hh: The SyscallReturn class is no longer in arch/syscallreturn.hh --HG-- extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e
2006-12-06Don't panic, but this needs to be fixed.Gabe Black
--HG-- extra : convert_revision : 7a4aed238d437dbb2cc5946b3045d53697070a27
2006-12-06Make syscalls flatten their register indices, and also call into the ISA's ↵Gabe Black
setSyscallReturn function rather than having a duplicated one. --HG-- extra : convert_revision : 1e83ef629a7fd143f2e35e68abaa56f81d6b9d9e
2006-12-06Change rename to rename the flattened register index instead of the ↵Gabe Black
architectural one. --HG-- extra : convert_revision : 757866ad7a3c8be7382e1ffa71c60bc00c861f6f
2006-12-06Added in endianness conversion on memory accesses as the data goes out. This ↵Gabe Black
will break the checker! --HG-- extra : convert_revision : b8191cab09ab8f3ced05693293f058382319ed8e
2006-12-06Change how optional delay slot instructions are detected and squashed.Gabe Black
--HG-- extra : convert_revision : ffd019d4adc2fbbc0a663d8dc6ef73edce12511b
2006-12-06Get rid of some typedefs which were hardly used, and move some stuff back ↵Gabe Black
here that shouldn't be in the architecture specific DynInst classes. --HG-- extra : convert_revision : dad0d7191acf773c16dc3ed9dd911f5e8bfc08b3
2006-12-02Fixes for MIPS_SE compiling. Regressions seem to work, but Korey should ↵Kevin Lim
make sure these changes (commit especially) work okay. src/cpu/o3/commit_impl.hh: src/cpu/o3/fetch_impl.hh: Fixes for MIPS_SE compile. --HG-- extra : convert_revision : fde9616f8e72b397c5ca965774172372cff53790
2006-11-29Change the connecting of the physPort and virtPort to the memory object ↵Kevin Lim
below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in. Right now this introduces a minor memory leak as old physPorts and virtPorts are not deleted when new ones are created. A flyspray task has been created for this issue. It can not be resolved until we determine how the bus will handle giving out ID's to functional ports that may be deleted. src/cpu/o3/cpu.cc: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: Change the setup of the physPort and virtPort to instead happen every time the CPU has a context activated. This is a little high overhead, but keeps it working correctly when the CPU does not have a physical memory attached to it until it switches in (like the case of switch CPUs). src/cpu/o3/thread_context.hh: Change function from being called at init() to just being called whenever the memory ports need to be connected. src/cpu/o3/thread_context_impl.hh: Update this to not delete the port if it's the same as the virtPort. src/cpu/thread_context.hh: Change function from being called at init() to whenever the memory ports need to be connected. src/cpu/thread_state.cc: Instead of initializing the ports, simply connect them, deleting any old ports that might exist. This allows these functions to be called multiple times. src/cpu/thread_state.hh: Ports are no longer initialized, but rather connected at context activation time. --HG-- extra : convert_revision : e399ce5dfbd6ad658c953a7c9c7b69b89a70219e
2006-11-24Initial changes to get O3 working with SPARCGabe Black
src/arch/sparc/process.cc: MachineBytes doesn't exist any more. src/arch/sparc/regfile.cc: Add in the miscRegFile for good measure. src/cpu/o3/isa_specific.hh: Add in a section for SPARC src/cpu/o3/sparc/cpu.cc: src/cpu/o3/sparc/cpu.hh: src/cpu/o3/sparc/cpu_builder.cc: src/cpu/o3/sparc/cpu_impl.hh: src/cpu/o3/sparc/dyn_inst.cc: src/cpu/o3/sparc/dyn_inst.hh: src/cpu/o3/sparc/dyn_inst_impl.hh: src/cpu/o3/sparc/impl.hh: src/cpu/o3/sparc/params.hh: src/cpu/o3/sparc/thread_context.cc: src/cpu/o3/sparc/thread_context.hh: Sparc version of this file. --HG-- extra : convert_revision : 34bb5218f802d0a1328132a518cdd769fb59b6a4
2006-11-23Use the right constant.Gabe Black
--HG-- extra : convert_revision : f93182ed41057025cc10df443b24e82fbe783df6
2006-11-22Merge zizzer:/bk/sparcfsGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 75f3398e38e18eb1f8248e23708d7a8d8cce0fc5
2006-11-20Add in checks of more Legion based state, and put in more sophisticated ↵Gabe Black
formatting functions. --HG-- extra : convert_revision : e3aa5919a6480aa01924c832a86fa1e8ddf5ba0d
2006-11-19Update Virtual and Physical ports.Kevin Lim
src/cpu/o3/alpha/cpu_impl.hh: Handle the PhysicalPort and VirtualPort in the ThreadState. src/cpu/o3/cpu.cc: Initialize the thread context. src/cpu/o3/thread_context.hh: Add new function to initialize thread context. src/cpu/o3/thread_context_impl.hh: Use code now put into function. src/cpu/simple_thread.cc: Move code to ThreadState and use the new helper function. src/cpu/simple_thread.hh: Remove init() in this derived class; use init() from ThreadState base class. src/cpu/thread_state.cc: Move setting up of Physical and Virtual ports here. Change getMemFuncPort() to connectToMemFunc(), which connects a port to a functional port of the memory object below the CPU. src/cpu/thread_state.hh: Update functions. --HG-- extra : convert_revision : ff254715ef0b259dc80d08f13543b63e4024ca8d
2006-11-17Make an initialization pass for the thread context and set the ↵Ron Dreslinski
[phys,virt]Port correctly src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: Call the thread context initialization --HG-- extra : convert_revision : d7dc2a8b893dc670077b7f6150d4b710a1778620
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
2006-11-16Fixes for SPARC_FSGabe Black
configs/common/FSConfig.py: Make a SPARC system create an IO bus. src/python/m5/objects/T1000.py: Create a T1000 platform src/arch/sparc/miscregfile.cc: Initialize the strand status register to the value legion provides. src/cpu/exetrace.cc: Truncate an ExtMachInst to a MachInst before comparing with Legion. --HG-- extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 8d61b474428d494b1a5382e4cf95934ad54e35dd
2006-11-14Various fixes to delete packet and request a little better.Kevin Lim
src/cpu/simple/timing.cc: Various updates for deleting requests more properly. The major change is moving the deletion of the fetch request/packet to after the instruction has executed and completed. This should fix a few bugs because Ron's memory system didn't expect a call for a functional access while a timing access was being processed. --HG-- extra : convert_revision : c7cf114bb1ff3cdaa7b0a40ed4c5302dc9d3a522
2006-11-14Make cpu's capable of having a phase shiftRon Dreslinski
--HG-- extra : convert_revision : 7f082ba5c1cd2445aec731950c31a877aac23a75
2006-11-13Changes needed for a bus from CPU->L1Ron Dreslinski
src/cpu/simple/atomic.cc: Make the atomic cpu return 0 on snoops. --HG-- extra : convert_revision : aad96ad36e0c764c7cfef8b0c8e97877574f5845
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
--HG-- extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
2006-11-13More interrupt reworking.Kevin Lim
--HG-- extra : convert_revision : 40dfbb72c4e418c54e909c54dad5fe6ef7017cb4
2006-11-13Change warn to DPRINTF.Kevin Lim
--HG-- extra : convert_revision : 746bdf92334d220158eb0eb6bf113b4dcedbb354
2006-11-12Fix typo.Kevin Lim
--HG-- extra : convert_revision : 05db10e20d33302fe830d5759b8881b1233aca87
2006-11-12Fix for regression failure.Kevin Lim
src/cpu/o3/fetch_impl.hh: Fetch needs to make sure it isn't waiting on an Icache access. --HG-- extra : convert_revision : b53eb58b9e5a00bdb394134586d1f84f84d1c6e1
2006-11-12Merge ktlim@zamp:./local/clean/tmp/test-regressKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
2006-11-12Fix for non-FS compile.Kevin Lim
--HG-- extra : convert_revision : 661b412b0ae670181b89cb7dbc5e9d813804aa7a
2006-11-12Updates to support new interrupt processing and removal of PcPAL.Kevin Lim
src/arch/alpha/interrupts.hh: No need for this now that the ThreadContext is being used to set these IPRs in interrupts. Also split up the interrupt checking from the updating of the IPL and interrupt summary. src/arch/alpha/tlb.cc: Check the PC for whether or not it's in PAL mode, not the addr. src/cpu/o3/alpha/cpu.hh: Split up getting the interrupt from actually processing the interrupt. src/cpu/o3/alpha/cpu_impl.hh: Splut up the processing of interrupts. src/cpu/o3/commit_impl.hh: Update for ISA-oriented interrupt changes. src/cpu/o3/fetch_impl.hh: Fix broken if statement from PcPAL updates, and properly populate the request fields. Also more debugging output. src/cpu/ozone/cpu_impl.hh: Updates for ISA-oriented interrupt stuff. src/cpu/ozone/front_end_impl.hh: Populate request fields properly. src/cpu/simple/base.cc: Update for interrupt stuff. --HG-- extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
2006-11-11Get rid of the ParamContext for pseudo instructions and moveNathan Binkert
the parameters to the BaseCPU object. --HG-- extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
2006-11-11The Lock_Flag_DepTag went away earlier, and using TheISA gives the false ↵Gabe Black
impression that this code is ISA independent. --HG-- extra : convert_revision : 67d9e51702efbe5f5244268e3753328a6cf1a1d5
2006-11-11Certain header files should only be used in FS.Gabe Black
src/arch/alpha/faults.hh: Only use pagetable.hh in FS src/arch/alpha/pagetable.hh: pagetable.hh should only be included in FS, so protecting it internally should be unnecessary. src/cpu/exetrace.cc: Only use tlb.hh in FS --HG-- extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
2006-11-10Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : e4f9bb663099662a94c5522e6b4955c2a83bac8d
2006-11-10fix endian issues with condition codesAli Saidi
use memcpy instead of bcopy s/u_int32_t/uint32_t/g fixup endian code to work with solaris hack to make sure htole() works... Nate, have a good idea to fix this? src/arch/sparc/faults.cc: set the reset address to be 40 bits. Makes PC printing easier at least for now. src/arch/sparc/isa/base.isa: fix endian issues with condition codes src/arch/sparc/tlb.hh: add implemented physical addres constants src/arch/sparc/utility.hh: add tlb.hh to utilities src/base/loader/raw_object.cc: add a symbol <filename>_start to the symbol table for binaries files src/base/remote_gdb.cc: use memcpy instead of bcopy src/cpu/exetrace.cc: clean up printing a bit more src/cpu/m5legion_interface.h: add tons to the shared interface src/dev/ethertap.cc: s/u_int32_t/uint32_t/g src/dev/ide_atareg.h: fixup endian code to work with solaris src/dev/pcidev.cc: src/sim/param.hh: hack to make sure htole() works... --HG-- extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 0c2db1e1b5fdb91c1ac5705ab872a6bfb575a67a
2006-11-10Change up some warnings to DPRINTFs.Kevin Lim
--HG-- extra : convert_revision : b3e9fa094d68f608865dedfc9f3f4125a20fd748
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : 56cb7fe3be5b63bd89b48ac6cb88b47d13b4c137
2006-11-10Change exetrace code for working with my trace tool to use stream io rather ↵Gabe Black
than sprintf which was breaking on 64 bit hosts. --HG-- extra : convert_revision : 184d751392dfcc8c80ac1a6c0ebc3061ff0a3f20
2006-11-09Get SPARC to the point that it starts running. Add ability to load the ROM ↵Ali Saidi
bin files, cleanup lockstep printing a bit Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work. SConstruct: Add TARGET_ISA to the list of environment variables that end up in the build_env for python configs/common/FSConfig.py: add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now src/SConscript: add a raw file object, at least until we get more info about how to compile openboot properly src/arch/sparc/system.cc: src/arch/sparc/system.hh: add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM src/base/loader/object_file.cc: src/base/loader/object_file.hh: add option to try raw when nothing works src/cpu/exetrace.cc: cleanup lockstep printing a little bit src/cpu/m5legion_interface.h: change the instruction to be 32 bits because it is src/mem/physical.cc: fix assert that doesn't work if memory starts somewhere above 0 src/python/m5/objects/BaseCPU.py: Add if statement to choose between sparc tlbs and alpha tlbs src/python/m5/objects/System.py: Add a sparc system that sets the rom addresses correctly src/python/m5/params.py: add the ability to add Addr() together --HG-- extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
2006-11-09Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : dafe2d4a032b277c219ea13faf20567c20c1f2f4
2006-11-09Draining fixes.Kevin Lim
src/cpu/o3/cpu.cc: Handle draining properly when CPU isn't actually being used. src/cpu/simple/atomic.cc: Be sure to set status properly when draining. src/mem/bus.cc: Fix for draining. --HG-- extra : convert_revision : d9796e6693e974f022159029fc9743c49a970c8f
2006-11-08Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops --HG-- extra : convert_revision : dc165840841bdd88e40111b98d1be493441703f0
2006-11-08Move the check to see if you're in user mode into the isa directory.Gabe Black
--HG-- extra : convert_revision : b5b7cdf4a5e5e54228c592093516bf18d0f7dbe6
2006-11-08Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : 29426cebe81ac077c1a83f50e914ff6955ce81d4
2006-11-08Put the ProcessInfo and StackTrace objects into the ISA namespaces.Gabe Black
--HG-- extra : convert_revision : 1626703583f02a1c9823874290462c1b6bdb6c3c
2006-11-07Put kernel_stats back into arch.Gabe Black
--HG-- rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
2006-11-07Only include kern/kernel_stats.hh if in full system. This was breaking MIPS_SEGabe Black
--HG-- extra : convert_revision : b3f956af92cb98b4945aebc8aece1dffcabdf15c
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