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cpu
Age
Commit message (
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Author
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-02-15
cpu: Refactor memory system checks
Andreas Sandberg
2013-02-15
cpu: Make checker CPUs inherit from CheckerCPU in the Python hierarchy
Andreas Sandberg
2013-02-15
cpu: Add CPU metadata om the Python classes
Andreas Sandberg
2013-02-15
cpu: include set in o3/commit_impl.
Ali Saidi
2013-02-15
cpu: fix case with o3 cpu blocking and unblocking decode in cycle
Ali Saidi
2013-02-15
cpu: Fix a livelock in the o3 cpu.
Ali Saidi
2013-01-24
branch predictor: move out of o3 and inorder cpus
Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E)
2013-01-22
o3 cpu: fix zero reg problem
Andrea Pellegrini
2013-01-22
x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch
Nilay Vaish
2013-01-19
O3 IEW: Make incrWb and decrWb clearer
Joel Hestness
2013-01-17
ruby: remove calls to g_system_ptr->getTime()
Nilay Vaish
2013-01-12
base simple cpu: removes commented out code about cache ops
Nilay Vaish
2013-01-12
x86: Changes to decoder, corrects 9376
Nilay Vaish
2013-01-07
cpu: Unify the serialization code for all of the CPU models
Andreas Sandberg
2013-01-07
cpu: Flush TLBs on switchOut()
Andreas Sandberg
2013-01-07
cpu: Rewrite O3 draining to avoid stopping in microcode
Andreas Sandberg
2013-01-07
cpu: Make sure that a drained atomic CPU isn't executing ucode
Andreas Sandberg
2013-01-07
cpu: Make sure that a drained timing CPU isn't executing ucode
Andreas Sandberg
2013-01-07
cpu: Fix broken thread context handover
Andreas Sandberg
2013-01-07
cpu: Fix O3 LSQ debug dumping constness and formatting
Andreas Sandberg
2013-01-07
cpu: Fix broken squashAfter implementation in O3 CPU
Andreas Sandberg
2013-01-07
o3 cpu: Remove unused variables
Andreas Sandberg
2013-01-07
cpu: Rename defer_registration->switched_out
Andreas Sandberg
2013-01-07
cpu: Remove unused params.hh header file in inorder CPU
Andreas Sandberg
2013-01-07
cpu: Introduce sanity checks when switching between CPUs
Andreas Sandberg
2013-01-07
cpu: Correctly call parent on switchOut() and takeOverFrom()
Andreas Sandberg
2013-01-07
cpu: Unify SimpleCPU and O3 CPU serialization code
Andreas Sandberg
2013-01-07
cpu: Initialize the O3 pipeline from startup()
Andreas Sandberg
2013-01-07
cpu: Implement a flat register interface in thread contexts
Andreas Sandberg
2013-01-07
arch: Move the ISA object to a separate section
Andreas Sandberg
2013-01-07
cpu: Check that the memory system is in the correct mode
Andreas Sandberg
2013-01-07
cpu: Share the send functionality between traffic generators
Andreas Hansson
2013-01-07
cpu: Add support for protobuf input for the trace generator
Andreas Hansson
2013-01-07
cpu: Encapsulate traffic generator input in a stream
Andreas Hansson
2013-01-07
cpu: Fix the traffic gen read percentage
Andreas Hansson
2013-01-07
arch: Make the ISA class inherit from SimObject
Andreas Sandberg
2013-01-07
o3: Fix issue with LLSC ordering and speculation
Ali Saidi
2013-01-07
cpu: rename the misleading inSyscall to noSquashFromTC
Ali Saidi
2013-01-04
Decoder: Remove the thread context get/set from the decoder.
Gabe Black
2012-12-11
ruby: modify the directed tester to read/write streams
Nilay Vaish
2012-12-06
TournamentBP: Fix some bugs with table sizes and counters
Erik Tomusk
2012-12-06
inorder cpu: add missing DPRINTF argument
Malek Musleh
2012-12-06
o3 cpu: remove some unused buggy functions in the lsq
Nathanael Premillieu
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
cpu: O3 add a header declaring the DerivO3CPU
Andreas Sandberg
2012-11-02
cpu: Add header files for checker CPUs
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-11-02
ARM: dump stats and process info on context switches
Dam Sunwoo
2012-11-02
o3: Fix a couple of issues with the local predictor.
Mrinmoy Ghosh
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