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AgeCommit message (Expand)Author
2007-03-08stop m5 from leaking like a sieveAli Saidi
2007-03-07I missed a couple of WithEffects, this should do itAli Saidi
2007-03-07Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-07*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscRegAli Saidi
2007-03-07Add setData functions for the new Twin??_t types.Gabe Black
2007-03-06Move all of the parameters of the Root SimObject so they areNathan Binkert
2007-03-05Add x86 version of call to "decode"Gabe Black
2007-03-05Added an x86 dyninstGabe Black
2007-03-03Merge zizzer:/bk/newmemAli Saidi
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way a...Ali Saidi
2007-02-28Make trap instructions always generate TrapInstruction Fault objects which ca...Gabe Black
2007-02-17Give the progress event its own priorityNathan Binkert
2007-02-17Default to tracing being disabled in C++, it will be turnedNathan Binkert
2007-02-13Merge all of the execution trace configuration stuff intoNathan Binkert
2007-02-12some forgotten commitsAli Saidi
2007-02-12Merge zizzer:/bk/newmemAli Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-02-12Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
2007-02-12Move store conditional result checking from SimpleAtomicCpu writeSteve Reinhardt
2007-02-10Clean up tracing stuff more, get rid of the trace log sinceNathan Binkert
2007-02-07Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
2007-02-06more fp fixesAli Saidi
2007-02-02fix mostly floating point relatedAli Saidi
2007-01-30add fsr to the list of registers we are interested inAli Saidi
2007-01-30Make SPARC checkpointing workAli Saidi
2007-01-29fix some over sights in moving windowing and ccr registers to int reg fileAli Saidi
2007-01-29Merge zizzer:/bk/newmemAli Saidi
2007-01-29A minor hack to get branch prediction to behave like before on Alpha.Gabe Black
2007-01-29Fixed a warning about an unused variable.Gabe Black
2007-01-28fix comparing fp registers between legion and m5Ali Saidi
2007-01-28Merge zizzer:/bk/newmemGabe Black
2007-01-27While I'm waiting for legion to run make m5 compile with a few more compilersAli Saidi
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Make Sparc traceflag even more chattyAli Saidi
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
2007-01-26make our code a little more standards compliantAli Saidi
2007-01-26Merge zizzer:/bk/newmemLisa Hsu
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-25fix smul and sdiv to sign extend, and handle overflow/underflow corretlyAli Saidi
2007-01-24Merge zizzer:/bk/newmemGabe Black
2007-01-23use pstate.am to mask off PC/NPC where it needs to +beAli Saidi
2007-01-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-01-19Merge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work/m5.newmemLisa Hsu
2007-01-16In the case that we generate a fault (e.g. a tlb miss) on a microcoded instru...Ali Saidi
2007-01-16Fix legion lock code a bit so that if we jump out of a micro coded instructio...Ali Saidi
2007-01-16Modify ISA and staticInst to support a IsFirstMicroOp flagAli Saidi
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