Age | Commit message (Collapse) | Author |
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parameters need to be fixed as well.
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actually compare xmm.
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SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses
The SimObject(const std::string &name) constructor was removed. Subclasses
that still rely on that behavior must call the parent initializer as
: SimObject(makeParams(name))
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into multiple memory access.
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counted.
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It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.
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doesn't cause a false branch mispredict.
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Lets CPU accesses to physical memory bypass Bus.
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Improve MRU checking for StaticInst, Bus, TLB
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Also some touch up for ruflag.
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Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat.
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People should never put pointers in DPRINTFs; it messes up
tracediffs. Plus these used the FullCPU trace flag, which
is not right.
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The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx.
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These need to be refined a little still and given parameters.
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Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.
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