index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
Age
Commit message (
Expand
)
Author
2014-11-23
kvm, x86: Adding support for SE mode execution
Alexandru Dutu
2014-11-14
arm: Fixes based on UBSan and static analysis
Andreas Hansson
2014-11-12
arm: Fix timing wakeup with LLSC
Ali Saidi
2014-11-06
x86 isa: This patch attempts an implementation at mwait.
Marc Orr
2014-11-06
cpu: Minor Draining Bug
Andrew Lukefahr
2014-10-29
cpu: Add writeback modeling for drain functionality
Mitch Hayenga
2014-10-29
cpu: Add drain check functionality to IEW
Mitch Hayenga
2014-10-29
cpu: Add support to checker for CACHE_BLOCK_ZERO commands.
Ali Saidi
2014-10-29
cpu: Fix barrier push to store buffer when full bug in Minor
Andrew Bardsley
2014-10-20
cpu: o3: corrects base FP and CC register index in removeThread()
Nilay Vaish
2014-10-16
arch: Use shared_ptr for all Faults
Andreas Hansson
2014-10-16
o3: Use shared_ptr for MemDepEntry
Andreas Hansson
2014-10-16
cpu: Probe points for basic PMU stats
Andreas Sandberg
2014-10-16
cpu: Add branch predictor PMU probe points
Andreas Sandberg
2014-10-11
cpu: Fix o3 SMT IQCount bug
Andrew Lukefahr
2014-10-09
cpu: Remove Ozone CPU from the source tree
Mitch Hayenga
2014-09-27
arch: Use const StaticInstPtr references where possible
Andreas Hansson
2014-09-27
scons: Address issues related to gcc 4.9.1
Andreas Hansson
2014-09-27
misc: Fix a bunch of minor issues identified by static analysis
Andreas Hansson
2014-09-20
cpu: Remove unused deallocateContext calls
Mitch Hayenga
2014-09-20
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
Mitch Hayenga
2014-09-20
mem: Rename Bus to XBar to better reflect its behaviour
Andreas Hansson
2014-09-20
cpu: Update DRAM traffic gen
Wendy Elsasser
2014-09-20
base: Clean up redundant string functions and use C++11
Andreas Hansson
2014-09-20
cpu: Add ExecFlags debug flag
Mitch Hayenga
2014-09-20
cpu: use probes infrastructure to do simpoint profiling
Dam Sunwoo
2014-09-19
arch: Pass faults by const reference where possible
Andreas Hansson
2014-09-19
cpu: Use a deque in o3 rename instruction queue
Andreas Hansson
2014-09-19
misc: Use safe_cast when assumptions are made about return value
Andreas Hansson
2014-09-12
cpu: Fix memory access in Minor not setting parent Request flags
Andrew Bardsley
2014-09-12
style: Fix line continuation, especially in debug messages
Andrew Bardsley
2014-09-12
minor: Fix typo in DPRINTF for Minor branch prediction
Andreas Hansson
2014-09-09
cpu: Only iterate over possible threads on the o3 cpu
Mitch Hayenga
2014-09-09
misc: Fix a number of unitialised variables and members
Andreas Hansson
2014-09-03
base: Use the global Mersenne twister throughout
Andreas Hansson
2014-05-13
mem: Refactor assignment of Packet types
Curtis Dunham
2014-09-03
cpu: Fix o3 drain bug
Mitch Hayenga
2014-04-29
arm: use condition code registers for ARM ISA
Curtis Dunham
2014-09-03
cpu: fix bimodal predictor to use correct global history reg
Dam Sunwoo
2014-09-03
cpu: Fix cache blocked load behavior in o3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix o3 quiesce fetch bug
Mitch Hayenga
2014-09-03
cpu: Fix SMT scheduling issue with the O3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix incorrect speculative branch predictor behavior
Mitch Hayenga
2014-09-03
cpu: Add a fetch queue to the o3 cpu
Mitch Hayenga
2014-09-03
cpu: Fix o3 front-end pipeline interlock behavior
Mitch Hayenga
2014-09-03
cpu: Change writeback modeling for outstanding instructions
Mitch Hayenga
2014-09-03
arch, cpu: Factor out the ExecContext into a proper base class
Andreas Sandberg
2014-09-01
mem: change the namespace Message to ProtoMessage
Nilay Vaish
2014-09-01
ruby: eliminate type Time
Nilay Vaish
2014-08-13
scons: Build the branch predictor for all CPUs
Andreas Sandberg
[next]