gem5 - gem5

Age	Commit message (Expand)	Author
2010-08-25	CPU: Print out traces for faluting inst when the flag ExecFaulting is set	Ali Saidi
2010-08-25	ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)	Min Kyu Jeong
2010-08-24	testers: move testers to a new directory	Brad Beckmann
2010-08-23	ISA: Get rid of old, unused utility functions cluttering up the ISAs.	Gabe Black
2010-08-23	CPU: Make the constants for StaticInst flags visible outside the class.	Gabe Black
2010-08-23	O3: Skipping mem-order violation check for uncachable loads.	Min Kyu Jeong
2010-08-23	ARM: Improve printing of uop disassembly.	Min Kyu Jeong
2010-08-23	CPU: Print out flatten-out register index as with IntRegs/FloatRegs traceflag	Min Kyu Jeong
2010-08-23	CPU: Make Exec trace to print predication result (if false) for memory instru...	Min Kyu Jeong
2010-08-23	ARM: mark msr/mrs instructions as SerializeBefore/After	Min Kyu Jeong
2010-08-23	O3: Handle loads when the destination is the PC.	Min Kyu Jeong
2010-08-23	ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.	Min Kyu Jeong
2010-08-23	CPU: Set a default value when readBytes faults.	Ali Saidi
2010-08-20	ruby: Fixed minor bug in ruby test for setting the request type	Brad Beckmann
2010-08-20	ruby: Resurrected Ruby's deterministic tests	Brad Beckmann
2010-08-20	memtest: Memtester support for DMA	Brad Beckmann
2010-08-14	Inorder: Fix compilation of m5.fast.	Gabe Black
2010-08-13	Merge with head.	Gabe Black
2010-08-13	CPU: Add readBytes and writeBytes functions to the exec contexts.	Gabe Black
2010-08-13	InOrder: Clean up some DPRINTFs that print data sent to/from the cache.	Gabe Black
2010-08-13	CPU: Tidy up endianness handling for mmapped "IPR"s.	Gabe Black
2010-08-12	TimingSimpleCPU: fix NO_ACCESS memory op handling	Joel Hestness
2010-07-22	LSQ Unit: After deleting part of a split request, set it to NULL so that it	Timothy M. Jones
2010-07-22	O3CPU: Fix a bug where stores in the cpu where never marked as split.	Timothy M. Jones
2010-07-22	O3CPU: O3's tick event gets squashed when it is switched out. When repeatedly	Timothy M. Jones
2010-06-28	inorder: remove another debug stat	Korey Sewell
2010-06-26	inorder: remove debugging stat	Korey Sewell
2010-06-25	inorder: Return Address Stack bug	Korey Sewell
2010-06-25	inorder: resource scheduling backend	Korey Sewell
2010-06-24	inorder: cleanup virtual functions	Korey Sewell
2010-06-24	inorder: enforce 78-character rule	Korey Sewell
2010-06-24	inorder: exe_unit_stats for resolved branches	Korey Sewell
2010-06-23	inorder: squash from memory stall	Korey Sewell
2010-06-23	inorder: record load/store trace data	Korey Sewell
2010-06-23	inorder: update branch predictor	Korey Sewell
2010-06-23	inorder-stats: add instruction type stats	Korey Sewell
2010-06-23	inorder: stall signal handling	Korey Sewell
2010-06-23	inorder: tick scheduling	Korey Sewell
2010-06-23	O3ThreadContext: When taking over from a previous context, only assert that	Timothy M. Jones
2010-06-14	stats: get rid of the never-really-used event stuff	Nathan Binkert
2010-06-10	ruby: get rid of the Map class	Nathan Binkert
2010-06-10	ruby: get rid of Vector and use STL	Nathan Binkert
2010-06-03	Minor remote GDB cleanup.	Steve Reinhardt
2010-06-02	ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.	Gabe Black
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi
2010-06-02	ARM: Implement ARM CPU interrupts	Ali Saidi
2010-06-02	ARM: Move PC mode bits around so they can be used for exectrace	Ali Saidi
2010-06-02	Simple CPU: Make the FloatRegs trace flag do something.	Gabe Black
2010-06-02	CPU: Reset fetch offset after a exception	Ali Saidi
2010-06-02	ARM: Make the predecoder handle Thumb instructions.	Gabe Black