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AgeCommit message (Expand)Author
2007-01-27Merge zizzer:/bk/newmemGabe Black
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Make Sparc traceflag even more chattyAli Saidi
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
2007-01-26make our code a little more standards compliantAli Saidi
2007-01-26Merge zizzer:/bk/newmemLisa Hsu
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-25fix smul and sdiv to sign extend, and handle overflow/underflow corretlyAli Saidi
2007-01-24Merge zizzer:/bk/newmemGabe Black
2007-01-23use pstate.am to mask off PC/NPC where it needs to +beAli Saidi
2007-01-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-01-19Merge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work/m5.newmemLisa Hsu
2007-01-16In the case that we generate a fault (e.g. a tlb miss) on a microcoded instru...Ali Saidi
2007-01-16Fix legion lock code a bit so that if we jump out of a micro coded instructio...Ali Saidi
2007-01-16Modify ISA and staticInst to support a IsFirstMicroOp flagAli Saidi
2007-01-08the way i understand it, interrupts in m5 is a little bloated. the usage of ...Lisa Hsu
2007-01-08change when legion-lock causes the simulation to die. It now happens after tw...Ali Saidi
2007-01-03FormattingNathan Binkert
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-30Fix up previous commit to proper logic.Kevin Lim
2006-12-28Fixes to get non-delay slot ISAs (Alpha) working again, and pulling some debu...Gabe Black
2006-12-28Phased out DelaySlotInfo.Gabe Black
2006-12-28Some fixes for decode stage branches without delay slots. This will need some...Gabe Black
2006-12-28Make sure the value of PC is actually updated now that the instruction target...Gabe Black
2006-12-28Implement a stub nnpc for alpha that is read only as npc+4.Gabe Black
2006-12-27Merge zizzer:/bk/newmemAli Saidi
2006-12-27Compare legion and m5 tlbs for differencesAli Saidi
2006-12-26Remove some #if FULL_SYSTEMs so MP stuff works even in SE mode.Kevin Lim
2006-12-21styleNathan Binkert
2006-12-20don't use (*activeThreads).begin(), use activeThreads->blah().Nathan Binkert
2006-12-20Merge zizzer.eecs.umich.edu:/bk/newmemNathan Binkert
2006-12-20<scold> Make sure that variables are always initalized! </scold>Nathan Binkert
2006-12-20Fixes to get MIPS_SE to compile.Gabe Black
2006-12-20Fixes to get ALPHA_FS and ALPHA_SE to compile again.Gabe Black
2006-12-20Initial work to make remote gdb available in SE mode. This is completely unte...Gabe Black
2006-12-19fix twinx loads a little bitAli Saidi
2006-12-18Fix a place where the wrong width parameter was used, and set the nextNPC cor...Gabe Black
2006-12-18Make sure you only handle branch delay slots specially when there actually wa...Gabe Black
2006-12-17Convert Alpha (and finish converting MIPS) to newSteve Reinhardt
2006-12-16Merge zizzer:/bk/newmemGabe Black
2006-12-16Switch the endianness of data that's forwarded. This is the same sort of prob...Gabe Black
2006-12-16Make fetch detect when a branch is happening, rather than trying to compute w...Gabe Black
2006-12-16Accidently "cleaned" away the NPC parameter to the constructor.Gabe Black
2006-12-16Don't have "predict" set the predicted target of the instruction. Do that exp...Gabe Black
2006-12-16Add in capability to return to unblocking after a squash. This is needed beca...Gabe Black
2006-12-16Make sure endian conversion is done on the memory data when it's just set to ...Gabe Black
2006-12-16Make the decoder use the new setup in the dyninsts for branch prediction.Gabe Black
2006-12-16Made branch delay slots get squashed, and passed back an NPC and NNPC to star...Gabe Black
2006-12-16Added a predicted NPC field, explicitly stored whether the instruction was pr...Gabe Black
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