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path: root/src/cpu
AgeCommit message (Expand)Author
2017-12-08x86,misc: add additional info on faulting X86 instruction, fetched PCMatt Sinclair
2017-12-05cpu: Add support for CMOs in the cpu modelsNikos Nikoleris
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-29cpu: Don't override ISA if provided by userAndreas Sandberg
2017-11-29cpu-minor: Add missing instruction statsDavid Guillen Fandos
2017-11-28cpu-o3: Add missing vector stat initializersAndreas Sandberg
2017-11-21cpu, cpu, sim: move Cycle probe updateJose Marinho
2017-11-21cpu-o3: Prevent cpu from suspending if it is already drainingNikos Nikoleris
2017-11-20cpu: Make automatic transition to OFF optionalJose Marinho
2017-11-20pwr: Adds logic to enter power gating for the cpu modelAnouk Van Laer
2017-11-14cpu, probe: Fix elastic trace register dependencyRadhika Jagtap
2017-10-19cpu-o3: Add M5_VAR_USED to variableJason Lowe-Power
2017-10-13cpu-o3: Check predication before the SQ size for a debug printNikos Nikoleris
2017-10-13cpu-o3: Avoid early checker verification for store conditionalsNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-09-06cpu: Fix bi-mode branch predictor thresholdsRico Amslinger
2017-09-01cpu-minor: Fix for addr range coverage calculationPau Cabre
2017-08-30cpu-o3: fix data pkt initialization for split loadMatthias Hille
2017-08-01kvm: Add a helper method to access device event queuesAndreas Sandberg
2017-08-01cpu, kvm: Fix deadlock issue when resuming a drained systemAndreas Sandberg
2017-07-19cpu: Add missing rename of vector registers in the O3 CPURekai Gonzalez-Alberquilla
2017-07-17cpu,o3: Fixed checkpointing bug occuring in the o3 CPUAnouk Van Laer
2017-07-12testers: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12kvm, mem: Refactor some Event subclasses into lambdasSean Wilson
2017-07-12cpu: Refactor some Event subclasses to lambdasSean Wilson
2017-07-12cpu, sim: Add param to force CPUs to wait for GDBJose Marinho
2017-07-07kvm, arm: Don't forward IRQ/FIQ when using the kernel's GICAndreas Sandberg
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Result refactoringRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05cpu: Physical register structural + flat indexingNathanael Premillieu
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-06-20cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-05-15cpu: fix problem with forwarding and locked loadAlec Roelke
2017-05-02python: Use PyBind11 instead of SWIG for Python wrappersAndreas Sandberg
2017-04-03arm, kvm: implement GIC state transferCurtis Dunham
2017-03-16cpu: Print progress messages in Trace CPURadhika Jagtap
2017-02-27syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess s...Brandon Potter
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2017-02-14sim, kvm: make KvmVM a System parameterCurtis Dunham
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2017-01-03sim: Remove redundant export_method_cxx_predeclsAndreas Sandberg
2016-12-21cpu: implement an L-TAGE branch predictorArthur Perais
2016-12-21cpu: disallow speculative update of branch predictor tables (o3)Arthur Perais
2016-12-21cpu: correct comments in tournament branch predictorArthur Perais
2016-12-21cpu: Resolve targets of predicted 'taken' decode for O3Arthur Perais
2016-12-21cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3Arthur Perais
2016-12-05cpu: Change traffic generators to use different values for writesNikos Nikoleris