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AgeCommit message (Expand)Author
2009-02-27Processes: Make getting and setting system call arguments part of a process o...Gabe Black
2009-02-26CPA: Add code to automatically record function symbols as CPU executes.Ali Saidi
2009-02-25CPU: Only look up the nearest symbol in the kernel if you're actually in kern...Gabe Black
2009-02-25CPU: Add a flag to identify a read barrier to the static inst class.Gabe Black
2009-02-25CPU: Don't fetch when executing a macroop.Gabe Black
2009-02-25CPU: Implement translateTiming which defers to translateAtomic, and convert t...Gabe Black
2009-02-25ISA: Replace the translate functions in the TLBs with translateAtomic.Gabe Black
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-23debug: Move debug_break into src/baseNathan Binkert
2009-02-20Remove unnecessary building of FreeList/RenameMap in InOrder. Clean-up commen...Korey Sewell
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
2009-02-10styleNathan Binkert
2009-02-10Configs: Add support for the InOrder CPU modelKorey Sewell
2009-02-10InOrder: Import new inorder CPU model from MIPS.Korey Sewell
2009-02-10ExeTrace: Allow subclasses of the tracer to define their own prefix to dumpKorey Sewell
2009-02-10CPU: Prepare CPU models for the new in-order CPU model.Korey Sewell
2009-02-01CPU: Don't always reset the micro pc on faults. Let the faults handle it.Gabe Black
2009-02-01X86: Make sure the predecoder is cleared out for interrupts.Gabe Black
2009-01-30Config: Cause a fatal() when a parameter without a default value isn't set(FS...Ali Saidi
2009-01-25CPU: Add a setCPU function to the interrupt objects.Gabe Black
2009-01-24cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep.Nathan Binkert
2009-01-21o3cpu: give a name to the activity recorder for better tracingNathan Binkert
2009-01-19thread_context: move getSystemPtr so SE mode can get to it.Nathan Binkert
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
2009-01-11This fix addresses an ill formed if statement that failsRichard Strong
2009-01-06Tracing: Make tracing aware of macro and micro ops.Gabe Black
2008-12-17Make Alpha pseudo-insts available from SE mode.Steve Reinhardt
2008-12-16SPARC: Truncate syscall args and return values appropriately.Gabe Black
2008-12-06eventq: use the flags data structureNathan Binkert
2008-11-13CPU: Refactor read/write in the simple timing CPU.Gabe Black
2008-11-10O3CPU: Make the instcount debugging stuff per-cpu.Clint Smullen
2008-11-10mem: update stuff for changes to Packet and RequestNathan Binkert
2008-11-09CPU: Make unaligned accesses work in the timing simple CPU.Gabe Black
2008-11-09X86: Make the timing simple CPU handle variable length instructions.Gabe Black
2008-11-05Right now a single thread cpu 1 could get assigned context Id != 1, dependingLisa Hsu
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-11-02Make it so that all thread contexts are registered with the System, even inLisa Hsu
2008-11-02make BaseCPU the provider of _cpuId, and cpuId() instead of being scatteredLisa Hsu
2008-10-27CPU: The API change to EventWrapper did not get propagated to the entirety o...Clint Smullen
2008-10-23s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos inLisa Hsu
2008-10-21style: Use the correct m5 style for things relating to interrupts.Nathan Binkert
2008-10-20O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Remo...Ali Saidi
2008-10-12CPU: Explain why some code is commented out.Gabe Black
2008-10-12X86: Make the MicroPC type 16 bit.Gabe Black
2008-10-12X86: Don't fetch in the simple CPU if you're in the ROM.Gabe Black
2008-10-12Get rid of old RegContext code.Gabe Black
2008-10-12CPU: Make the highest order bit in the micro pc determine if it's combination...Gabe Black
2008-10-12CPU: Create a microcode ROM object in the CPU which is defined by the ISA.Gabe Black
2008-10-12X86: Fix the ordering of special physical address ranges.Gabe Black
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