| Age | Commit message (Expand) | Author |
|---|
| 2020-01-07 | cpu: Disable O3CPU value forwarding with write strobes | Gabor Dozsa |
| 2020-01-07 | cpu: Use enums for O3CPU store value forwarding | Gabor Dozsa |
| 2020-01-03 | cpu: Fix issue with MinorCPU predicated-false mem. accesses | Giacomo Gabrielli |
| 2020-01-03 | cpu: Disable MinorCPU value forwarding with write strobes | Gabor Dozsa |
| 2019-12-11 | cpu: Replace empty byteEnable check with Request::isMasked | Giacomo Travaglini |
| 2019-12-11 | cpu: Fix coding style (byteEnable->byte_enable) | Giacomo Travaglini |
| 2019-12-11 | cpu: Add byteEnable assertions to readMem and initateMemRead | Giacomo Travaglini |
| 2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
| 2019-12-03 | cpu,sim-se: move error checks in syscall methods | Brandon Potter |
| 2019-11-26 | cpu: prefix ExecEnable to the native trace to match DPRINTF | Ciro Santilli |
| 2019-11-26 | base: generalize ExecTicks to all messages with FmtTicksOff | Ciro Santilli |
| 2019-11-26 | arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated ifdefs. | Gabe Black |
| 2019-11-25 | cpu: log thread activate and suspend with --debug-flags Thread | Ciro Santilli |
| 2019-11-07 | cpu: Fix a bug in getCurrentInstCount in the checker CPU. | Gabe Black |
| 2019-11-06 | cpu: Use std::array for registers in SimpleThread. | Gabe Black |
| 2019-11-02 | arch,cpu: Move endianness conversion of inst bytes into the ISA. | Gabe Black |
| 2019-10-31 | cpu-o3: bugfix for partial faults in x86 | Brandon Potter |
| 2019-10-30 | cpu-o3: Fix handling of some mem. order violations | Giacomo Gabrielli |
| 2019-10-25 | cpu: Get rid of the nextInstEventCount method. | Gabe Black |
| 2019-10-25 | cpu: Get rid of the serviceInstCountEvents method. | Gabe Black |
| 2019-10-25 | cpu: Switch off of the CPU's comInstEventQueue. | Gabe Black |
| 2019-10-25 | cpu: Access inst events through ThreadContext instead of the CPU. | Gabe Black |
| 2019-10-25 | cpu: Delegate comInstEventQueue methods to the ThreadContexts. | Gabe Black |
| 2019-10-25 | cpu: Make accesses to comInstEventQueue indirect through methods. | Gabe Black |
| 2019-10-25 | cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts. | Gabe Black |
| 2019-10-25 | cpu: Make the ThreadContext a PCEventScope. | Gabe Black |
| 2019-10-25 | cpu,sim: Get rid of a bunch of conditional compilation for PCEvents. | Gabe Black |
| 2019-10-25 | cpu: Don't print the CPU name when a (Break|Panic)PCEvent happens. | Gabe Black |
| 2019-10-25 | cpu: Pass the address to check into the PCEventQueue service method. | Gabe Black |
| 2019-10-25 | cpu: Stop checking for PC changes when servicing a PCEventQueue. | Gabe Black |
| 2019-10-25 | cpu: Create a PCEventScope class to abstract the scope of PCEvents. | Gabe Black |
| 2019-10-23 | cpu: Apply the ARM TLB rework to the O3 checker CPU. | Gabe Black |
| 2019-10-21 | cpu: Apply the ARM TLB rework to the checker CPU. | Gabe Black |
| 2019-10-19 | cpu,arm: Push the stage 2 MMUs out of the CPU into the TLBs. | Gabe Black |
| 2019-10-19 | arch: Make a base class for Interrupts. | Gabe Black |
| 2019-10-18 | cpu: Turn the stage 2 ARM MMUs from params to children. | Gabe Black |
| 2019-10-17 | cpu: Clean up some style issues in pc_event.(hh|cc). | Gabe Black |
| 2019-10-17 | cpu: Get rid of load count based events. | Gabe Black |
| 2019-10-15 | cpu: Delete the unused sched_break_pc(_sys) functions. | Gabe Black |
| 2019-10-15 | sim,cpu: Get rid of the unused instEventQueue. | Gabe Black |
| 2019-10-04 | kvm: Rename gettid() to build with glibc 2.30+ | Tommaso Marinelli |
| 2019-09-30 | cpu: Make use of DRAMCtrl::AddrMap in the traffic generators | Nikos Nikoleris |
| 2019-09-24 | cpu: Fix checker cpu instantiation | Nikos Nikoleris |
| 2019-09-23 | cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor> | Jordi Vaquero |
| 2019-09-04 | cpu: reset byte_enable across writeMem calls | Ciro Santilli |
| 2019-08-29 | cpu: Convert traffic gen to use new stats | Andreas Sandberg |
| 2019-08-28 | cpu: Make get(Data|Inst)Port return a Port and not a MasterPort. | Gabe Black |
| 2019-08-28 | cpu, mem: Add new getSendFunctional method to the base CPU. | Gabe Black |
| 2019-08-28 | cpu: Move the instruction port into o3's fetch stage. | Gabe Black |
| 2019-08-28 | cpu: Move O3's data port into the LSQ. | Gabe Black |
