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path: root/src/dev/SConscript
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2015-04-23dev: Add support for i2c devicesPeter Enns
This patch adds an I2C bus and base device. I2C is used to connect a variety of sensors, and this patch serves as a starting point to enable a range of I2C devices.
2014-02-18dev: Include basic devices in NULL ISA buildAndreas Hansson
This patch enbles use of the basic PIO devices as part of the NULL build. Although it might seem counter intuitive to have a PIO device without being able to execute a driver, this change enables us to break a device class hierarchy into an ISA-agnostic part, and an ISA-specific part, without requiring multiple-inheritance. The ISA-agnostic base class is a PIO device, but does not make use of the port.
2013-09-04arch: Resurrect the NOISA build target and rename it NULLAndreas Hansson
This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. --HG-- rename : build_opts/NOISA => build_opts/NULL rename : src/arch/noisa/SConsopts => src/arch/null/SConsopts rename : src/arch/noisa/cpu_dummy.hh => src/arch/null/cpu_dummy.hh rename : src/cpu/intr_control.cc => src/cpu/intr_control_noisa.cc
2012-05-23DMA: Split the DMA device and IO device into seperate filesAndreas Hansson
This patch moves the DMA device to its own set of files, splitting it from the IO device. There are no behavioural changes associated with this patch. The patch also grabs the opportunity to do some very minor tidying up, including some white space removal and pruning some redundant parameters. Besides the immediate benefits of the separation-of-concerns, this patch also makes upcoming changes more streamlined as it split the devices that are only slaves and the DMA device that also acts as a master. --HG-- rename : src/dev/io_device.cc => src/dev/dma_device.cc rename : src/dev/io_device.hh => src/dev/dma_device.hh
2011-09-30SE/FS: Build the devices in SE mode.Gabe Black
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-02-11VNC/ARM: Use VNC server and add support to boot into X11Ali Saidi
2010-11-19SCons: Support building without an ISAAli Saidi
2009-01-17CopyEngine: Implement a I/OAT-like copy engine.Ali Saidi
2008-12-05IGbE: Add support for newer 8257x based Intel NICsAli Saidi
2008-06-17Ethernet: share statistics between all ethernet devices and apply someNathan Binkert
of those statistics to the e1000 model.
2008-06-17Rename SimConsole to Terminal since it makes more senseNathan Binkert
--HG-- rename : src/dev/SimConsole.py => src/dev/Terminal.py rename : src/dev/simconsole.cc => src/dev/terminal.cc rename : src/dev/simconsole.hh => src/dev/terminal.hh
2008-06-12Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.Gabe Black
2008-03-25Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.Gabe Black
--HG-- extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one ↵Ali Saidi
file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-03-15add all the registers we'll need to support for the Intel GbE device and ↵Ali Saidi
support enough functionality make the driver think the device is there, and in good working order. src/dev/SConscript: add intel gbe to the dev SCons file src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: src/dev/i8254xGBe_defs.hh: use new manner of registers and implement all device registers that are touched through boot and ifup --HG-- extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
2007-03-10Rework the way SCons recurses into subdirectories, making itNathan Binkert
automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2006-11-06Get rid of pcifake.cc and tsunami_fake.cc to go with the merged default devices.Gabe Black
--HG-- extra : convert_revision : e88aaaa43843c1283f29cef0886e057412705899
2006-11-06Moved the tsunami devices into the dev/alpha directory. Other devices ↵Gabe Black
"generic" devices are dependent on some of those files. That will either need to change, or most likely those devices will have to be considered architecture dependent. --HG-- rename : src/dev/tsunami.cc => src/dev/alpha/tsunami.cc rename : src/dev/tsunami.hh => src/dev/alpha/tsunami.hh rename : src/dev/tsunami_cchip.cc => src/dev/alpha/tsunami_cchip.cc rename : src/dev/tsunami_cchip.hh => src/dev/alpha/tsunami_cchip.hh rename : src/dev/tsunami_io.cc => src/dev/alpha/tsunami_io.cc rename : src/dev/tsunami_io.hh => src/dev/alpha/tsunami_io.hh rename : src/dev/tsunami_pchip.cc => src/dev/alpha/tsunami_pchip.cc rename : src/dev/tsunami_pchip.hh => src/dev/alpha/tsunami_pchip.hh rename : src/dev/tsunamireg.h => src/dev/alpha/tsunamireg.h extra : convert_revision : ffbb6fd93341d2623a6932bf096019b8976da694
2006-11-06Created seperate SConscript for the dev directory. Made subdirectories for ↵Gabe Black
Alpha and SPARC and put SConscripts in them. --HG-- rename : src/base/kgdb.h => src/arch/alpha/kgdb.h rename : src/dev/alpha_access.h => src/dev/alpha/access.h rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
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